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Tue, 17 Mar 2026 00:11:16 -0500 Received: from [10.136.37.230] (10.180.168.240) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Tue, 17 Mar 2026 00:11:08 -0500 Message-ID: <9fa8ef20-1da2-48e3-a9d8-340a5106cea8@amd.com> Date: Tue, 17 Mar 2026 10:41:07 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 7/7] futex: Use runtime constants for __futex_hash() hot path To: Samuel Holland CC: Darren Hart , Davidlohr Bueso , =?UTF-8?Q?Andr=C3=A9_Almeida?= , , , , , , Alexandre Ghiti , "H. Peter Anvin" , Kiryl Shutsemau , Sean Christopherson , Charlie Jenkins , Charles Mirabile , Christian Borntraeger , Sven Schnelle , Thomas Huth , Jisheng Zhang , Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Sebastian Andrzej Siewior , Paul Walmsley , Palmer Dabbelt , Albert Ou , Borislav Petkov , Dave Hansen , , Catalin Marinas , Will Deacon , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Arnd Bergmann References: <20260316052401.18910-1-kprateek.nayak@amd.com> <20260316052401.18910-8-kprateek.nayak@amd.com> Content-Language: en-US From: K Prateek Nayak In-Reply-To: X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B075:EE_|MN2PR12MB4439:EE_ X-MS-Office365-Filtering-Correlation-Id: de3a01ff-9094-4428-b186-08de83e39e4d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|7416014|376014|36860700016|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: qJ+qfHkyDhpuyR+nI64b1GyuVhK0vG8KRwSbX554heKAtoHgAY02m50fp6/lgVgDm1XFrifv/OIyRigELP8YJukqJ/qwUWwZWz1jCeT+EgWtjbcWxXA5A9Em/1JJclv3nKzU+uLjiWp2ZdnH6Kwrw0fzk5Ags7ch1TqZDa08wlZbv1UwKaXuzM7UHJnosk28VVwfd3afidYtnZiOpW3giZ7PnVGZtWhmsx5NrQ37fpzRyOlFHLSWUqv8xjnrvrINTziXw8sCiiKRqc6QLIwAQm0PYlAYWLQ17+8yWYIboptjCmTTBiqXH6U5FmlK5lR4pC2IZ3G1g/VdB0+e5QRUefCeUX+gsFAjWXNT4/HfRw3nAFAr9vK2LhHvU2JYanzRip6DVr95HCnWRs6iEGhiYlI+21NuyQI4H/4jsuoTiEFD7fPSn3zCGxzrwLzxPez4mAG/vkqfpMyBQ9XD44KCe1m9uxVhX7VqUr3WduRVEDceAwCjjUVviXjyJfK2rA8zoUxsew89gwXBZIrLXhIlGwUR/Y0g7ExCgyNxtf2fdBB3bnLD0BUqezwkIUqrsG8+54kTuzU1tG+ueAtjbl8DtVv8WuSzdzmP8ufrZMYFSfCnHV7xuzaEgfjOH6FuU2P54MNLH2YVWHBz55p43Uf+t3aaLIIvgYePt0f7XcSChpSMQufoA+TxINCM12hJG/XtjLER7NbsFEN1/sukMLZGFi2VN429sz985PfToBY8nMSZtgowo/feYm4bZdi4kOANcDokOHPTp53mVHNs3dF0fQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(7416014)(376014)(36860700016)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LgMejL8HVi51SFtSNVzhPWyVNfVnUQ/Ufp6pUMOJ7lcTSAOt/UGXndRmRIKero3m8FyRmUBRkyogQ65C5FfK6tvJNL+8Y163Lr53Z8ae54tYOvcDqB5Pslkw8vxB4x75BI5/zk4ndW3JFg5V6ru6GYrzWGSadnZiB8tH6ZZPXG5LsC5cPzRJsYp0mS9rdIBwqSHFEWBYGjZv3YAPwE/vagABUCcU+oP0DvqtTSij1ylS+RzKBO6GVsPyQi3sDotFTHrsSfVaXFAZToUVDEw2PCWP8m5RP+Zd8G2ZDjgWGJBb4hDpHYBKQx8XNereiVhBDSMFT1ujliXrUMQhYNJWPgMXy4SSygdh/lx4cTMhYT0CDn2CHr1rBuq+zfwLYLBzbfzDzxeKMuqEqXdDRiu4DL5fGV2CaexHHgWtooZINsFp1sjS/iGRNeCyCMxqqbRB X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2026 05:11:16.9497 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: de3a01ff-9094-4428-b186-08de83e39e4d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B075.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4439 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260316_221125_626818_CA8F8DDC X-CRM114-Status: GOOD ( 14.61 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hello Samuel, On 3/17/2026 8:36 AM, Samuel Holland wrote: >> @@ -1913,7 +1909,7 @@ int futex_hash_allocate_default(void) >> * 16 <= threads * 4 <= global hash size >> */ >> buckets = roundup_pow_of_two(4 * threads); >> - buckets = clamp(buckets, 16, futex_hashmask + 1); >> + buckets = clamp(buckets, 16, __futex_mask + 1); >> >> if (current_buckets >= buckets) >> return 0; >> @@ -1983,10 +1979,19 @@ static int __init futex_init(void) >> hashsize = max(4, hashsize); >> hashsize = roundup_pow_of_two(hashsize); >> #endif >> - futex_hashshift = ilog2(hashsize); >> + __futex_mask = hashsize - 1; >> + __futex_shift = ilog2(hashsize); > > __futex_mask is always a power of two minus 1, in other words all low bits set. > Would it be worth using an n-bit zero extension operation instead of an > arbitrary 32-bit mask? This would use fewer instructions on some architectures: > for example a single ubfx on arm64 and slli+srli on riscv. Sure that works for __futex_mask but runtime_const_mask_32() should be generic enough to handle any mask, no? Currently, the __futex_hash() with futex_hashmask ends up being: # ./include/linux/jhash.h:139: __jhash_final(a, b, c); xor a4,a4,a3 # tmp350, tmp353, tmp334 ... # kernel/futex/core.c:449: return &futex_queues[node][hash & futex_hashmask]; lla a3,.LANCHOR0 # tmp361, # kernel/futex/core.c:449: return &futex_queues[node][hash & futex_hashmask]; ld a5,0(a3) # __futex_data.hashmask, __futex_data.hashmask ... # kernel/futex/core.c:449: return &futex_queues[node][hash & futex_hashmask]; and a5,a5,a4 # tmp358, tmp367, __futex_data.hashmask which isn't too far from what runtime_const_mask_32() implements where "lla + ld" sequence gets replaced by the "lui + addi" sequence to load the immediate. Sure it can be better here since we know the bitmask is of the form GENMASK(N,0) but IMO runtime_const_mask_32() should generally work for all masks. Now, runtime_const_mask_lower_32(val, nbits) may be a better suited API name for that purpose. If there is enough interest, I'll go back to the drawing board and go that route for v2 for arm64 and riscv. -- Thanks and Regards, Prateek _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv