messages from 2026-07-15 00:50:13 to 2026-07-15 06:21:20 UTC [more...]
[PATCH v2] riscv: smp: set CPU 0 possible in setup_smp()
2026-07-15 6:20 UTC (5+ messages)
[RFC PATCH 00/34] mm: optimize unnecessary loads due to ptep_get() and friends out
2026-07-15 6:15 UTC (9+ messages)
` [RFC PATCH 02/34] ARM: mm: make 2-level pgd_t a scalar
[PATCH v2 0/3] RISC-V: KVM: fix vcpu vector context handling
2026-07-15 5:16 UTC (4+ messages)
` [PATCH v2 1/3] riscv: vector: refactor riscv_v_start_kernel_context
` [PATCH v2 2/3] riscv: vector: allow non-preemptible kernel-mode vector with IRQs off
` [PATCH v2 3/3] RISC-V: KVM: fix vcpu vector context handling for kernel-mode vector
[PATCH] thermal: spacemit: k1: disable hardware on driver remove
2026-07-15 3:11 UTC (3+ messages)
[PATCH] KVM: riscv: Fix Spectre-v1 in vector register access
2026-07-15 3:08 UTC
[RFC PATCH 0/7] riscv: iommu: Add QoS ID support for resctrl device assignment
2026-07-15 2:55 UTC (5+ messages)
` [RFC PATCH 1/7] iommu: Add group lookup by ID
[PATCH v1] iommu/riscv: Support 32-bit register accesses
2026-07-15 2:37 UTC (8+ messages)
` [PATCH v3] iommu/riscv: Use 32-bit MMIO accesses for 64-bit registers
[PATCH] RISC-V: KVM: Fix lost virtual interrupts during IRQ sync
2026-07-15 2:03 UTC (7+ messages)
` [PATCH v4] RISC-V: KVM: Serialize virtual interrupt pending state updates
` [PATCH v5] "
[PATCH] arch/riscv: vdso: remove CFI landing pad from rt_sigreturn
2026-07-15 1:37 UTC (5+ messages)
[PATCH v2 0/2] Add CoreSight nodes for Qualcomm Shikra SoC
2026-07-15 1:16 UTC (3+ messages)
` [PATCH v2 1/2] dt-bindings: arm: add CTCU device for shikra
` [PATCH v2 2/2] arm64: dts: qcom: shikra: Add coresight nodes
[PATCH RESEND 0/2] riscv: mm: Some optimizations for tlb flush
2026-07-15 1:14 UTC (3+ messages)
` [PATCH RESEND 1/2] riscv: mm: Apply svinval in update_mmu_cache()
[PATCH 0/2] Add CoreSight nodes for Qualcomm Shikra SoC
2026-07-15 0:49 UTC (4+ messages)
` [PATCH 2/2] arm64: dts: qcom: shikra: Add coresight nodes
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