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From: Andy Chiu <andy.chiu@sifive.com>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: ebiggers@kernel.org, jerry.shih@sifive.com,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu,  herbert@gondor.apana.org.au,
	davem@davemloft.net,  Conor Dooley <conor.dooley@microchip.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	 Conor Dooley <conor@kernel.org>,
	heiko@sntech.de, phoebe.chen@sifive.com,
	 hongrong.hsu@sifive.com, linux-riscv@lists.infradead.org,
	 linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org
Subject: Re: [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions
Date: Thu, 7 Dec 2023 23:31:19 +0800	[thread overview]
Message-ID: <CABgGipVad0ohfhWc4tA0865atKLMLazwJ4u-3e3MF=aesVKQSg@mail.gmail.com> (raw)
In-Reply-To: <mhng-9f5b6a98-57f4-40a8-becc-93319bbed97c@palmer-ri-x1c9>

Hi Palmer,

On Thu, Dec 7, 2023 at 1:07 AM Palmer Dabbelt <palmer@dabbelt.com> wrote:
>
> On Tue, 05 Dec 2023 23:41:55 PST (-0800), ebiggers@kernel.org wrote:
> > Hi Jerry,
> >
> > On Wed, Dec 06, 2023 at 03:02:40PM +0800, Jerry Shih wrote:
> >> On Dec 6, 2023, at 08:46, Eric Biggers <ebiggers@kernel.org> wrote:
> >> > On Tue, Dec 05, 2023 at 05:27:49PM +0800, Jerry Shih wrote:
> >> >> This series depend on:
> >> >> 2. support kernel-mode vector
> >> >> Link: https://lore.kernel.org/all/20230721112855.1006-1-andy.chiu@sifive.com/
> >> >> 3. vector crypto extensions detection
> >> >> Link: https://lore.kernel.org/lkml/20231017131456.2053396-1-cleger@rivosinc.com/
> >> >
> >> > What's the status of getting these prerequisites merged?
> >> >
> >> > - Eric
> >>
> >> The latest extension detection patch version is v5.
> >> Link: https://lore.kernel.org/lkml/20231114141256.126749-1-cleger@rivosinc.com/
> >> It's still under reviewing.
> >> But I think the checking codes used in this crypto patch series will not change.
> >> We could just wait and rebase when it's merged.
> >>
> >> The latest kernel-mode vector patch version is v3.
> >> Link: https://lore.kernel.org/all/20231019154552.23351-1-andy.chiu@sifive.com/
> >> This patch doesn't work with qemu(hit kernel panic when using vector). It's not
> >> clear for the status. Could we still do the reviewing process for the gluing code and
> >> the crypto asm parts?
> >
> > I'm almost ready to give my Reviewed-by for this whole series.  The problem is
> > that it can't be merged until its prerequisites are merged.
> >
> > Andy Chiu's last patchset "riscv: support kernel-mode Vector" was 2 months ago,
> > but he also gave a talk at Plumbers about it more recently
> > (https://www.youtube.com/watch?v=eht3PccEn5o).  So I assume he's still working
> > on it.  It sounds like he's also going to include support for preemption, and
> > optimizations to memcpy, memset, memmove, and copy_{to,from}_user.
>
> So I think we just got blocked on not knowing if turning on vector
> everywhere in the kernel was a good idea -- it's not what any other port
> does despite there having been some discussions floating around, but we
> never really figured out why.  I can come up with some possible
> performance pathologies related to having vector on in many contexts,
> but it's all theory as there's not really any vector hardware that works
> upstream (though the K230 is starting to come along, so maybe that'll
> sort itself out).
>
> Last we talked I think the general consensus is that we'd waited long
> enough, if nobody has a concrete objection we should just take it and
> see -- sure maybe there's some possible issues, but anything could have
> issues.
>
> > I think it would be a good idea to split out the basic support for
> > kernel_vector_{begin,end} so that the users of them, as well as the preemption
> > support, can be considered and merged separately.  Maybe patch 1 of the series
> > (https://lore.kernel.org/r/20231019154552.23351-2-andy.chiu@sifive.com) is all
> > that's needed initially?
>
> I'm fine with that sort of approach too, it's certainly more in line
> with other ports to just restrict the kernel-mode vector support to
> explicitly enabled sections.  Sure maybe there's other stuff to do in
> kernel vector land, but we can at least get something going.

With the current approach of preempt_v we still need
kernel_vector_begin/end to explicitly mark enabled sections. But
indeed, preempt_v will make it easy to do function-wise, thread-wise
enable if people need it.

>
> > Andy, what do you think?
>
> I'll wait on Andy to see, but I generally agree we should merge
> something for this cycle.
>
> Andy: maybe just send a patch set with what you think is the best way to
> go?  Then we have one target approach and we can get things moving.

Yes, I think we can split. It will introduce some overhead on my side,
but at least we can get some parts moving. I was preempted by some
higher priority tasks. Luckily I am back now. Please expect v4 by next
week, I hope it won't be too late for the cycle.

>
> > - Eric

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  reply	other threads:[~2023-12-07 15:31 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-05  9:27 [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions Jerry Shih
2023-12-05  9:27 ` [PATCH v3 01/12] RISC-V: add helper function to read the vector VLEN Jerry Shih
2023-12-05  9:27 ` [PATCH v3 02/12] RISC-V: hook new crypto subdir into build-system Jerry Shih
2023-12-05  9:27 ` [PATCH v3 03/12] RISC-V: crypto: add OpenSSL perl module for vector instructions Jerry Shih
2023-12-05  9:27 ` [PATCH v3 04/12] RISC-V: crypto: add Zvkned accelerated AES implementation Jerry Shih
2023-12-05  9:27 ` [PATCH v3 05/12] crypto: simd - Update `walksize` in simd skcipher Jerry Shih
2023-12-05  9:27 ` [PATCH v3 06/12] RISC-V: crypto: add accelerated AES-CBC/CTR/ECB/XTS implementations Jerry Shih
2023-12-05  9:27 ` [PATCH v3 07/12] RISC-V: crypto: add Zvkg accelerated GCM GHASH implementation Jerry Shih
2023-12-05  9:27 ` [PATCH v3 08/12] RISC-V: crypto: add Zvknha/b accelerated SHA224/256 implementations Jerry Shih
2023-12-05  9:27 ` [PATCH v3 09/12] RISC-V: crypto: add Zvknhb accelerated SHA384/512 implementations Jerry Shih
2023-12-05  9:27 ` [PATCH v3 10/12] RISC-V: crypto: add Zvksed accelerated SM4 implementation Jerry Shih
2023-12-05  9:28 ` [PATCH v3 11/12] RISC-V: crypto: add Zvksh accelerated SM3 implementation Jerry Shih
2023-12-05  9:28 ` [PATCH v3 12/12] RISC-V: crypto: add Zvkb accelerated ChaCha20 implementation Jerry Shih
2023-12-06  0:46 ` [PATCH v3 00/12] RISC-V: provide some accelerated cryptography implementations using vector extensions Eric Biggers
2023-12-06  7:02   ` Jerry Shih
2023-12-06  7:41     ` Eric Biggers
2023-12-06 17:07       ` Palmer Dabbelt
2023-12-07 15:31         ` Andy Chiu [this message]
2023-12-22  5:48 ` Eric Biggers
2023-12-30  3:51   ` Eric Biggers
2024-01-02  5:16     ` Jerry Shih

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