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Thu, 15 May 2025 10:09:34 -0700 Received: from 348282803490 named unknown by gmailapi.google.com with HTTPREST; Thu, 15 May 2025 10:09:34 -0700 From: Emil Renner Berthing In-Reply-To: <20250502103101.957016-3-e@freeshell.de> References: <20250502103101.957016-1-e@freeshell.de> <20250502103101.957016-3-e@freeshell.de> Mime-Version: 1.0 Date: Thu, 15 May 2025 10:09:34 -0700 X-Gm-Features: AX0GCFtbB_vNvAHLPwksxwineqOYhEEn3iOraJm-aHuirOkyFfVbsN4SakWjbrc Message-ID: Subject: Re: [PATCH v3 2/4] riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz To: E Shattow , Conor Dooley , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Hal Feng X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250515_100938_320833_3673EE7A X-CRM114-Status: GOOD ( 13.96 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org E Shattow wrote: > Use qspi flash read-delay and spi-max-frequency settings compatible with > U-Boot bootloader. > > Observations from testing on Pine64 Star64 hardware within U-Boot bootloader > and read-delay=2 are spi-max-frequency less than 49.8MHz fails to write, > corrupt data writes at 25MHz to 49.799999MHz, and valid data writes at > 49.8MHz to 100MHz (not tested above 100MHz). No valid spi-max-frequency > was found for 1 > Looking around the Linux codebase it is common to see read-delay 2 cycles > with spi-max-frequency 100MHz and testing confirms this to work in both > U-Boot and Linux. > > Signed-off-by: E Shattow > Reviewed-by: Hal Feng Thanks! Acked-by: Emil Renner Berthing > --- > arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi > index f1489e9bb83e..5c525686c043 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi > @@ -317,8 +317,8 @@ &qspi { > nor_flash: flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > - cdns,read-delay = <5>; > - spi-max-frequency = <12000000>; > + cdns,read-delay = <2>; > + spi-max-frequency = <100000000>; > cdns,tshsl-ns = <1>; > cdns,tsd2d-ns = <1>; > cdns,tchsh-ns = <1>; > -- > 2.49.0 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv