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Fri, 18 Nov 2022 09:55:57 -0800 (PST) X-Google-Smtp-Source: AA0mqf4X/I6qvXUaj8j659xYAf6Xh78fhOeaJMLEVRA7IEhZ0OhKSxtwJeWXI961OdXwiSzv2eekCAOkOn6eBdnAOrs= X-Received: by 2002:a81:9a0b:0:b0:370:2d3:c361 with SMTP id r11-20020a819a0b000000b0037002d3c361mr7429904ywg.251.1668794157042; Fri, 18 Nov 2022 09:55:57 -0800 (PST) MIME-Version: 1.0 References: <20221118011714.70877-1-hal.feng@starfivetech.com> <20221118011714.70877-8-hal.feng@starfivetech.com> In-Reply-To: <20221118011714.70877-8-hal.feng@starfivetech.com> From: Emil Renner Berthing Date: Fri, 18 Nov 2022 18:55:40 +0100 Message-ID: Subject: Re: [PATCH v2 7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board device tree To: Hal Feng Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Ben Dooks , Thomas Gleixner , Marc Zyngier , Stephen Boyd , Michael Turquette , Philipp Zabel , Linus Walleij , linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221118_095601_985410_D3003C13 X-CRM114-Status: GOOD ( 18.80 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 18 Nov 2022 at 02:17, Hal Feng wrote: > > From: Emil Renner Berthing > > Add a minimal device tree for StarFive JH7110 VisionFive2 board. Missing space between VisionFive and 2. > Support booting and basic clock/reset/pinctrl/uart drivers. > > Signed-off-by: Emil Renner Berthing > Co-developed-by: Jianlong Huang > Signed-off-by: Jianlong Huang > Co-developed-by: Hal Feng > Signed-off-by: Hal Feng > --- > arch/riscv/boot/dts/starfive/Makefile | 1 + > .../jh7110-starfive-visionfive-v2.dts | 116 ++++++++++++++++++ > 2 files changed, 117 insertions(+) > create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile > index 0ea1bc15ab30..e1237dbc6aac 100644 > --- a/arch/riscv/boot/dts/starfive/Makefile > +++ b/arch/riscv/boot/dts/starfive/Makefile > @@ -1,2 +1,3 @@ > # SPDX-License-Identifier: GPL-2.0 > dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb > +dtb-$(CONFIG_SOC_STARFIVE) += jh7110-starfive-visionfive-v2.dtb > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts > new file mode 100644 > index 000000000000..c8946cf3a268 > --- /dev/null > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts > @@ -0,0 +1,116 @@ > +// SPDX-License-Identifier: GPL-2.0 OR MIT > +/* > + * Copyright (C) 2022 StarFive Technology Co., Ltd. > + * Copyright (C) 2022 Emil Renner Berthing > + */ > + > +/dts-v1/; > +#include "jh7110.dtsi" > +#include > +#include > + > +/ { > + model = "StarFive VisionFive V2"; > + compatible = "starfive,visionfive-v2", "starfive,jh7110"; Again, please consult your colleagues if you're calling the board "VisionFive 2" or "VisionFive V2" and name the file, model and board accordingly. > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + linux,initrd-start = <0x46100000>; > + linux,initrd-end = <0x4c000000>; These two lines don't belong here. They're added by the bootloader dynamically. > + stdout-path = "serial0:115200"; You're missing a n8. > + }; > + > + cpus { > + timebase-frequency = <4000000>; > + }; > + > + memory@40000000 { > + device_type = "memory"; > + reg = <0x0 0x40000000 0x1 0x0>; > + }; > + > + gpio-restart { > + compatible = "gpio-restart"; > + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; > + priority = <224>; > + }; > +}; > + > +&osc { > + clock-frequency = <24000000>; > +}; > + > +&clk_rtc { > + clock-frequency = <32768>; > +}; > + > +&gmac0_rmii_refin { > + clock-frequency = <50000000>; > +}; > + > +&gmac0_rgmii_rxin { > + clock-frequency = <125000000>; > +}; > + > +&gmac1_rmii_refin { > + clock-frequency = <50000000>; > +}; > + > +&gmac1_rgmii_rxin { > + clock-frequency = <125000000>; > +}; > + > +&i2stx_bclk_ext { > + clock-frequency = <12288000>; > +}; > + > +&i2stx_lrck_ext { > + clock-frequency = <192000>; > +}; > + > +&i2srx_bclk_ext { > + clock-frequency = <12288000>; > +}; > + > +&i2srx_lrck_ext { > + clock-frequency = <192000>; > +}; > + > +&tdm_ext { > + clock-frequency = <49152000>; > +}; > + > +&mclk_ext { > + clock-frequency = <12288000>; > +}; > + > +&gpio { > + uart0_pins: uart0-0 { > + tx-pins { > + pinmux = ; > + bias-disable; > + drive-strength = <12>; > + input-disable; > + input-schmitt-disable; > + slew-rate = <0>; > + }; > + > + rx-pins { > + pinmux = ; > + bias-pull-up; There are external pull-ups, so maybe change this line to bias-disable; /* external pull-up */ > + drive-strength = <2>; > + input-enable; > + input-schmitt-enable; > + slew-rate = <0>; > + }; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pins>; > + status = "okay"; > +}; > -- > 2.38.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv