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From: arnd@arndb.de (Arnd Bergmann)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 1/3] PCI: Add hooks for bus/bridge-specific fixups
Date: Tue, 19 Jun 2018 16:31:06 +0200	[thread overview]
Message-ID: <CAK8P3a2PzaDaug5XHeGHjurVU5mAsHstxOm7cDJf44LoPdmipQ@mail.gmail.com> (raw)
In-Reply-To: <20180619141700.7842-2-hch@lst.de>

On Tue, Jun 19, 2018 at 4:16 PM, Christoph Hellwig <hch@lst.de> wrote:
> From: "Wesley W. Terpstra" <wesley@sifive.com>

> index 340029b2fb38..ea9609fc44fc 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -662,6 +662,7 @@ static inline int pcibios_err_to_errno(int err)
>  struct pci_ops {
>         int (*add_bus)(struct pci_bus *bus);
>         void (*remove_bus)(struct pci_bus *bus);
> +       void (*add_dev)(struct pci_dev *dev, struct pci_bus *bus);
>         void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
>         int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
>         int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);

We are a bit inconsistent about adding callbacks to pci_ops or pci_host_bridge.
I would argue this should be part of pci_host_bridge, and the other two should
probably be there as well, or possibly moved into a separate
'pci_host_bridge_ops'
structure referenced from pci_host_bridge along with the other callbacks there.

One of the things we discussed in the past (but never implemented) is that
many of the current '__weak' functions in the PCI core can be turned into
host_bridge specific operations.

Some config space operations by contrast are currently shared across host
bridge drivers (see pci_bus_set_ops, or drivers/pci/ecam.c) and probably
better left out of the host bridge.

      Arnd

  reply	other threads:[~2018-06-19 14:31 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-19 14:16 add support for Xilinx PCIe root ports on RISC-V Christoph Hellwig
2018-06-19 14:16 ` [PATCH 1/3] PCI: Add hooks for bus/bridge-specific fixups Christoph Hellwig
2018-06-19 14:31   ` Arnd Bergmann [this message]
2018-06-19 17:32     ` Christoph Hellwig
2018-06-19 18:48       ` Sinan Kaya
2018-06-19 14:16 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-06-19 14:17 ` [PATCH 3/3] PCI/xilinx: Depend on OF instead of the ARCH Christoph Hellwig

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