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[209.85.219.179]) by smtp.gmail.com with ESMTPSA id v2-20020ac873c2000000b003a50248b89esm1502074qtp.26.2022.10.28.05.46.19 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 28 Oct 2022 05:46:19 -0700 (PDT) Received: by mail-yb1-f179.google.com with SMTP id f205so6014941yba.2 for ; Fri, 28 Oct 2022 05:46:19 -0700 (PDT) X-Received: by 2002:a25:cd01:0:b0:6c2:6f0d:f4ce with SMTP id d1-20020a25cd01000000b006c26f0df4cemr46239035ybf.365.1666961178681; Fri, 28 Oct 2022 05:46:18 -0700 (PDT) MIME-Version: 1.0 References: <20220920184904.90495-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220920184904.90495-5-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: <20220920184904.90495-5-prabhakar.mahadev-lad.rj@bp.renesas.com> From: Geert Uytterhoeven Date: Fri, 28 Oct 2022 14:46:07 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 04/10] dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC To: Prabhakar Cc: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Geert Uytterhoeven , Magnus Damm , Conor Dooley , Heiko Stuebner , Heinrich Schuchardt , Atish Patra , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Biju Das , Lad Prabhakar , Krzysztof Kozlowski X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221028_054622_773977_E8DE6A11 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Sep 20, 2022 at 8:50 PM Prabhakar wrote: > From: Lad Prabhakar > > Document Renesas RZ/Five (R9A07G043) SoC. > > More info about RZ/Five SoC: > https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet > > Signed-off-by: Lad Prabhakar > Acked-by: Krzysztof Kozlowski > Reviewed-by: Geert Uytterhoeven > --- > v3 -> v4 > * No change Will queue in renesas-devel for v6.2. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv