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Tue, 03 Jun 2025 05:27:46 -0700 (PDT) MIME-Version: 1.0 References: <20250530-apr_14_for_sending-v3-0-83d5744d997c@samsung.com> <20250530-apr_14_for_sending-v3-7-83d5744d997c@samsung.com> In-Reply-To: <20250530-apr_14_for_sending-v3-7-83d5744d997c@samsung.com> From: Ulf Hansson Date: Tue, 3 Jun 2025 14:27:11 +0200 X-Gm-Features: AX0GCFuhikVc4rQPnpXMCgeyFTV30-WWzpds7-nPqvmmTrY7jKqhLTeVB-8SqLA Message-ID: Subject: Re: [PATCH v3 7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node To: Michal Wilczynski Cc: Drew Fustini , Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Marek Szyprowski , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250603_052748_212489_DDAC076E X-CRM114-Status: GOOD ( 17.56 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, 30 May 2025 at 00:24, Michal Wilczynski wrote: > > Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD > TH1520 SoC used by the Lichee Pi 4A board. This node enables support for > the GPU using the drm/imagination driver. > > By adding this node, the kernel can recognize and initialize the GPU, > providing graphics acceleration capabilities on the Lichee Pi 4A and > other boards based on the TH1520 SoC. > > Add fixed clock gpu_mem_clk, as the MEM clock on the T-HEAD SoC can't be > controlled programatically. > > Signed-off-by: Michal Wilczynski > --- > arch/riscv/boot/dts/thead/th1520.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index 6170eec79e919b606a2046ac8f52db07e47ef441..ee937bbdb7c08439a70306f035b1cc82ddb4bae2 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -225,6 +225,13 @@ aonsys_clk: clock-73728000 { > #clock-cells = <0>; > }; > > + gpu_mem_clk: mem-clk { > + compatible = "fixed-clock"; > + clock-frequency = <0>; > + clock-output-names = "gpu_mem_clk"; > + #clock-cells = <0>; > + }; > + > stmmac_axi_config: stmmac-axi-config { > snps,wr_osr_lmt = <15>; > snps,rd_osr_lmt = <15>; > @@ -504,6 +511,21 @@ clk: clock-controller@ffef010000 { > #clock-cells = <1>; > }; > > + gpu: gpu@ffef400000 { > + compatible = "thead,th1520-gpu", "img,img-bxm-4-64", > + "img,img-rogue"; > + reg = <0xff 0xef400000 0x0 0x100000>; > + interrupt-parent = <&plic>; > + interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk_vo CLK_GPU_CORE>, > + <&gpu_mem_clk>, > + <&clk_vo CLK_GPU_CFG_ACLK>; > + clock-names = "core", "mem", "sys"; > + power-domains = <&aon TH1520_GPU_PD>; > + power-domain-names = "a"; If the power-domain-names are really needed, please pick a useful/descriptive name. [...] Kind regards Uffe _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv