From: Chen Wang <unicorn_wang@outlook.com>
To: Inochi Amaoto <inochiama@gmail.com>,
Thomas Gleixner <tglx@linutronix.de>,
Paul Walmsley <paul.walmsley@sifive.com>,
Samuel Holland <samuel.holland@sifive.com>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>,
Nam Cao <namcao@linutronix.de>
Subject: Re: [PATCH v2] irqchip/sifive-plic: Respect mask state when setting affinity
Date: Thu, 21 Aug 2025 14:37:25 +0800 [thread overview]
Message-ID: <MAUPR01MB1107213FB5E04569DC6010DE5FE32A@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <20250811002633.55275-1-inochiama@gmail.com>
On 8/11/2025 8:26 AM, Inochi Amaoto wrote:
> The plic_set_affinity always call plic_irq_enable(), which clears up
> the priority setting even the irq is only masked. This make the irq
> unmasked unexpectly.
>
> Replace the plic_irq_enable/disable() with plic_irq_toggle() to
> avoid changing priority setting.
>
> Suggested-by: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> Reviewed-by: Nam Cao <namcao@linutronix.de>
> Tested-by: Nam Cao <namcao@linutronix.de> # VisionFive 2
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
It is recommended to add the following email link about the relevant
discussion in the commit message for quich reference when there is a
revision or merge:
https://lore.kernel.org/lkml/20250722224513.22125-1-inochiama@gmail.com/
Tested-by: Chen Wang <unicorn_wang@outlook.com> # Pioneerbox
> ---
> Change from v1:
> 1. apply Nam's tag
> 2. remove unnecessary off-topic change in plic_irq_disable()
> ---
> drivers/irqchip/irq-sifive-plic.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
> index bf69a4802b71..866e38612b94 100644
> --- a/drivers/irqchip/irq-sifive-plic.c
> +++ b/drivers/irqchip/irq-sifive-plic.c
> @@ -179,12 +179,14 @@ static int plic_set_affinity(struct irq_data *d,
> if (cpu >= nr_cpu_ids)
> return -EINVAL;
>
> - plic_irq_disable(d);
> + /* Invalidate the original routing entry */
> + plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 0);
>
> irq_data_update_effective_affinity(d, cpumask_of(cpu));
>
> + /* Setting the new routing entry if irq is enabled */
> if (!irqd_irq_disabled(d))
> - plic_irq_enable(d);
> + plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 1);
>
> return IRQ_SET_MASK_OK_DONE;
> }
> --
> 2.50.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
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next prev parent reply other threads:[~2025-08-21 7:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-11 0:26 [PATCH v2] irqchip/sifive-plic: Respect mask state when setting affinity Inochi Amaoto
2025-08-21 6:37 ` Chen Wang [this message]
2025-08-24 0:40 ` Chen Wang
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