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X-IronPort-AV: E=Sophos;i="5.97,312,1669100400"; d="asc'?scan'208";a="201712956" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 20 Feb 2023 03:33:26 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16; Mon, 20 Feb 2023 03:33:25 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.16 via Frontend Transport; Mon, 20 Feb 2023 03:33:23 -0700 Date: Mon, 20 Feb 2023 10:32:57 +0000 From: Conor Dooley To: Anup Patel CC: Conor Dooley , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Atish Patra , Alistair Francis , Anup Patel , , , Subject: Re: [PATCH v2 6/9] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Message-ID: References: <20230103141409.772298-1-apatel@ventanamicro.com> <20230103141409.772298-7-apatel@ventanamicro.com> MIME-Version: 1.0 In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230220_023331_473231_C9F19B45 X-CRM114-Status: GOOD ( 19.96 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============8110069369278534396==" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org --===============8110069369278534396== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="oq5et5R3KJ6LBPlj" Content-Disposition: inline --oq5et5R3KJ6LBPlj Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hey Anup, On Mon, Feb 20, 2023 at 10:06:49AM +0530, Anup Patel wrote: > On Thu, Jan 5, 2023 at 3:47 AM Conor Dooley wrote: > > On Tue, Jan 03, 2023 at 07:44:06PM +0530, Anup Patel wrote: > > > We add DT bindings document for RISC-V advanced platform level > > > interrupt controller (APLIC) defined by the RISC-V advanced > > > interrupt architecture (AIA) specification. > > > > > > Signed-off-by: Anup Patel > > > --- > > > .../interrupt-controller/riscv,aplic.yaml | 159 ++++++++++++++++= ++ > > > 1 file changed, 159 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/interrupt-contr= oller/riscv,aplic.yaml > > I'm sorry Anup, but this child versus delegate thing is still not clear > > to me binding wise. See below. >=20 > There are two different information in-context of APLIC domain: >=20 > 1) HW child domain numbering: If an APLIC domain has N children > then HW will have a fixed child index for each of the N children > in the range 0 to N-1. This HW child index is required at the time > of setting up interrupt delegation in sourcecfgX registers. The > "riscv,children" DT property helps firmware (or bootloader) find > the total number of child APLIC domains and corresponding > HW child index number. >=20 > 2) IRQ delegation to child domains: An APLIC domain can delegate > any IRQ range(s) to a particular APLIC child domain. The > "riscv,delegate" DT property is simply a table where we have > one row for each IRQ range which is delegated to some child > APLIC domain. This property is more of a system setting fixed > by the RISC-V platform vendor. Thanks for the explanations. It's been a while since my brain swapped this stuff out, but I think delegate/child makes sense to me now. Just don't ask me to write the dt entry as proof... Thanks, Conor. --oq5et5R3KJ6LBPlj Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY/NMWQAKCRB4tDGHoIJi 0sA5AQCb+6M/fBkWGw999APet2trx8vgEFPEqNrYEq/4Ao54SQEA2x1nyqApHLMa 7qdYK/TB1TlgBDnZ0TvxpDcYLBPaiAI= =VmEP -----END PGP SIGNATURE----- --oq5et5R3KJ6LBPlj-- --===============8110069369278534396== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv --===============8110069369278534396==--