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X-IronPort-AV: E=Sophos;i="5.95,173,1661842800"; d="scan'208";a="183997215" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Oct 2022 00:06:00 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Mon, 10 Oct 2022 00:05:58 -0700 Received: from wendy (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12 via Frontend Transport; Mon, 10 Oct 2022 00:05:57 -0700 Date: Mon, 10 Oct 2022 08:05:35 +0100 From: Conor Dooley To: Andrew Jones CC: Vernon Yang , , , , , , Subject: Re: [PATCH] RISC-V: KVM: fixup undefined reference to riscv_cbom_block_size Message-ID: References: <202210091222.xuZquaM9-lkp@intel.com> <20221010013329.199167-1-vernon2gm@gmail.com> <20221010065949.is3kf54ctt2kdmjd@kamzik> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20221010065949.is3kf54ctt2kdmjd@kamzik> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221010_000600_406521_D6CC1337 X-CRM114-Status: GOOD ( 28.25 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Oct 10, 2022 at 08:59:49AM +0200, Andrew Jones wrote: > On Mon, Oct 10, 2022 at 07:42:04AM +0100, Conor Dooley wrote: > > On Mon, Oct 10, 2022 at 09:33:29AM +0800, Vernon Yang wrote: > > > When some RISC-V compilers do not support the Zicbom extension, > > > the build system auto disable the CONFIG_RISCV_ISA_ZICBOM, so the > > > source code of the relevant function is not compiled, resulting > > > in the definition of the riscv_cbom_block_size variable cannot > > > be found > > > > Hmm, my understanding was that riscv_cbom_block_size was not supposed to > > depend on CONFIG_RISCV_ISA_ZICBOM because the thead is able to use it > > even if the toolchain does not support it. > > > > The code in cacheflush.h looks like: > > extern unsigned int riscv_cbom_block_size; > > #ifdef CONFIG_RISCV_ISA_ZICBOM > > void riscv_init_cbom_blocksize(void); > > #else > > static inline void riscv_init_cbom_blocksize(void) { } > > #endif > > > > #ifdef CONFIG_RISCV_DMA_NONCOHERENT > > void riscv_noncoherent_supported(void); > > #endif > > > > It's early and I only had a quick look but I think that this is not > > defined because RISCV_DMA_NONCOHERENT is not defined, not because of > > RISCV_ISA_ZICBOM. > > thead is able to use riscv_cbom_block_size because it does its own > initialization of it and selects RISCV_DMA_NONCOHERENT to get access > to it. KVM depends on the initializer in dma-noncoherent.c, which is > guarded by RISCV_ISA_ZICBOM and does not select RISCV_DMA_NONCOHERENT, > but RISCV_ISA_ZICBOM does. I think guarding use of riscv_cbom_block_size > with RISCV_ISA_ZICBOM in KVM makes sense. Aight chief, you know the code better than I do :) > > I'm not the KVM maintainer, but I dislike #ifdefery > > in c files, so it'd be nice I think to sort this out in the header and > > not have to worry about guarding the variable. > > I also dislike #ifdefery, but unless we move riscv_cbom_block_size to > an unconditionally built file like cacheflush.c (as Anup once did), then > we don't have much choice. Fair enough. Maybe once fixes, for-next & some of Heiko's cleanups have aligned it'll make sense to do such a change. Sorry for the noise then, Conor. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv