[PATCH 0/9] Linux RISC-V AIA Support

Anup Patel
2022-11-11T04:43:02Z

The RISC-V AIA specification is now frozen as-per the RISC-V international
process. The latest frozen specifcation can be found at:
https://github.com/riscv/riscv-aia/releases/download/1.0-RC1/riscv-interrupts-1.0-RC1.pdf

At a high-level, the AIA specification adds three things:
1) AIA CSRs
- Improved local interrupt support
2) Incoming Message Signaled Interrupt Controller (IMSIC)
- Per-HART MSI controller
- Support MSI virtualization
- Support IPI along with virtualization
3) Advanced Platform-Level Interrupt Controller (APLIC)
- Wired interrupt controller
- In MSI-mode, converts wired interrupt into MSIs (i.e. MSI generator)
- In Direct-mode, injects external interrupts directly into HARTs

For an overview of the AIA specification, refer the recent AIA virtualization
talk at KVM Forum 2022:
https://static.sched.com/hosted_files/kvmforum2022/a1/AIA_Virtualization_in_KVM_RISCV_final.pdf
https://www.youtube.com/watch?v=r071dL8Z0yo

This series adds required Linux irqchip drivers for AIA and it depends on
the recent "RISC-V IPI Improvements".
(Refer, https://lore.kernel.org/lkml/20221101143400.690000-1-apatel@ventanamicro.com/t/)

To test this series, use QEMU v7.1 (or higher) and OpenSBI v1.1 (or higher).

These patches can also be found in the riscv_aia_v1 branch at:
https://github.com/avpatel/linux.git

Anup Patel (9):
RISC-V: Add AIA related CSR defines
RISC-V: Detect AIA CSRs from ISA string
irqchip/riscv-intc: Add support for RISC-V AIA
dt-bindings: Add RISC-V incoming MSI controller bindings
irqchip: Add RISC-V incoming MSI controller driver
dt-bindings: Add RISC-V advanced PLIC bindings
irqchip: Add RISC-V advanced PLIC driver
RISC-V: Select APLIC and IMSIC drivers for QEMU virt machine
MAINTAINERS: Add entry for RISC-V AIA drivers

.../interrupt-controller/riscv,aplic.yaml | 136 ++
.../interrupt-controller/riscv,imsic.yaml | 174 +++
MAINTAINERS | 12 +
arch/riscv/Kconfig.socs | 2 +
arch/riscv/include/asm/csr.h | 92 ++
arch/riscv/include/asm/hwcap.h | 8 +
arch/riscv/kernel/cpu.c | 2 +
arch/riscv/kernel/cpufeature.c | 2 +
drivers/irqchip/Kconfig | 32 +-
drivers/irqchip/Makefile | 2 +
drivers/irqchip/irq-riscv-aplic.c | 656 +++++++++
drivers/irqchip/irq-riscv-imsic.c | 1207 +++++++++++++++++
drivers/irqchip/irq-riscv-intc.c | 37 +-
include/linux/irqchip/riscv-aplic.h | 117 ++
include/linux/irqchip/riscv-imsic.h | 92 ++
15 files changed, 2564 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,imsic.yaml
create mode 100644 drivers/irqchip/irq-riscv-aplic.c
create mode 100644 drivers/irqchip/irq-riscv-imsic.c
create mode 100644 include/linux/irqchip/riscv-aplic.h
create mode 100644 include/linux/irqchip/riscv-imsic.h

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