From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4802C4332F for ; Fri, 16 Dec 2022 07:03:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6smtaSy0nGytvvtc+Uwv3ipireDwSHi3QNWM3khkte4=; b=TcFhcwrDqnbzZo KC4DnwLkZJ44c7jxhhtSFCWyHfXQyQlOrbf1Nw37T7IqLxlTiWXVjaKMofPs8dEv+qk5qSjb6H5Jr 3k74pgBrXlFFCwLLWanQ3E8MMfGoLgU6NnGHyVmV1sah9L8Vs1Dxul0ipzoy4jam2vfZUIw+pyRk2 yJOqG6kVEggP5GDVtIOPG3cPZ/4QTwt8RjNatKRSobHVQsBWH+yyssVOYJfF6jrxb/AI7ZYGFj+uc 4tB8hkTl5Ft9uIEgtIE0/QVkoXd1aCDU1Vtjqs/XnfoJ5uBbpupGIJQFm+rVu5BJwI36Jl7jRJEXd y3TYIniNf+owhdq8TjIg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p64kH-00DIlD-Rh; Fri, 16 Dec 2022 07:03:01 +0000 Received: from hch by bombadil.infradead.org with local (Exim 4.94.2 #2 (Red Hat Linux)) id 1p64kE-00DIki-Kq; Fri, 16 Dec 2022 07:02:58 +0000 Date: Thu, 15 Dec 2022 23:02:58 -0800 From: Christoph Hellwig To: Palmer Dabbelt Cc: geert@linux-m68k.org, Christoph Hellwig , soc@kernel.org, Conor Dooley , prabhakar.csengg@gmail.com, Arnd Bergmann , Paul Walmsley , aou@eecs.berkeley.edu, magnus.damm@gmail.com, heiko@sntech.de, Conor Dooley , samuel@sholland.org, guoren@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jszhang@kernel.org, Atish Patra , apatel@ventanamicro.com, ajones@ventanamicro.com, nathan@kernel.org, philipp.tomsich@vrull.eu, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Subject: Re: [PATCH v5 6/6] soc: renesas: Add L2 cache management for RZ/Five SoC Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Dec 15, 2022 at 01:40:30PM -0800, Palmer Dabbelt wrote: > Given that we already moved the SiFive one out it seems sane to just start > with the rest in drivers/soc/$VENDOR. Looks like it was Christoph's idea to > do the move, so I'm adding him in case he's got an opinion (and also the SOC > alias, as that seems generally relevant). Well, it isn't an integral architecture feature, so it doesn't really beloing into arch. Even the irqchip and timer drivers that are more less architectural are in drivers/ as they aren't really core architecture code. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv