From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7739BC25B4E for ; Fri, 20 Jan 2023 16:31:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OUN9MEmdxjF7pEmm8oS+1kb3DUnmE5KIsP9+G6bYIVw=; b=ykf36fTkTONi2d fxu90JPK4FMyvJf8xDqpyVfxrMI/kSUpv2PbLc9AysqU/DYTjsSwZxgNkYQDqO+axagfBZ10zM2WI oEogXBOGCBx7UVjo9eSy1r++fwUEX/hclWKeB0s2QMjUdDBXzr+J27uX02dvQ6x0fidCcDwEHdj3/ 04uhcn9pQzcztnfN9wXktjFUubCj9M87O0311O5BPaSC0JDRDVXp+UD9Du0y5f0CE9Q7HaEtv4scI CBnSrBgkQkmoPV5r1toUucZdBxsgd/TsFuGJPTZtEyorRkKg5qCU4Iak3JzX/nTdE3By1wRbK2dz0 iflHUWCcQFN2fqr/6tAQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pIuIX-00BFO6-SH; Fri, 20 Jan 2023 16:31:25 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pItAd-00AxYK-Og for linux-riscv@lists.infradead.org; Fri, 20 Jan 2023 15:19:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B58B214BF; Fri, 20 Jan 2023 07:19:46 -0800 (PST) Received: from FVFF77S0Q05N (unknown [10.57.11.233]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 175CD3F67D; Fri, 20 Jan 2023 07:18:55 -0800 (PST) Date: Fri, 20 Jan 2023 15:18:48 +0000 From: Mark Rutland To: Yann Sionneau Cc: Arnd Bergmann , Jonathan Corbet , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Will Deacon , Peter Zijlstra , Boqun Feng , Eric Biederman , Kees Cook , Oleg Nesterov , Ingo Molnar , Waiman Long , "Aneesh Kumar K.V" , Andrew Morton , Nick Piggin , Paul Moore , Eric Paris , Christian Brauner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jules Maselbas , Guillaume Thouvenin , Clement Leger , Vincent Chardon , Marc =?utf-8?B?UG91bGhpw6hz?= , Julian Vetter , Samuel Jones , Ashley Lesdalons , Thomas Costis , Marius Gligor , Jonathan Borne , Julien Villette , Luc Michel , Louis Morhet , Julien Hascoet , Jean-Christophe Pince , Guillaume Missonnier , Alex Michon , Huacai Chen , WANG Xuerui , Shaokun Zhang , John Garry , Guangbin Huang , Bharat Bhushan , Bibo Mao , Atish Patra , "Jason A. Donenfeld" , Qi Liu , Jiaxun Yang , Catalin Marinas , Mark Brown , Janosch Frank , Alexey Dobriyan , Benjamin Mugnier , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-audit@redhat.com, linux-riscv@lists.infradead.org, bpf@vger.kernel.org Subject: Re: [RFC PATCH v2 11/31] kvx: Add atomic/locking headers Message-ID: References: <20230120141002.2442-1-ysionneau@kalray.eu> <20230120141002.2442-12-ysionneau@kalray.eu> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230120141002.2442-12-ysionneau@kalray.eu> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230120_071911_946682_75212AB8 X-CRM114-Status: GOOD ( 18.27 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Jan 20, 2023 at 03:09:42PM +0100, Yann Sionneau wrote: > Add common headers (atomic, bitops, barrier and locking) for basic > kvx support. > > Co-developed-by: Clement Leger > Signed-off-by: Clement Leger > Co-developed-by: Jules Maselbas > Signed-off-by: Jules Maselbas > Co-developed-by: Julian Vetter > Signed-off-by: Julian Vetter > Co-developed-by: Julien Villette > Signed-off-by: Julien Villette > Co-developed-by: Yann Sionneau > Signed-off-by: Yann Sionneau > --- > > Notes: > V1 -> V2: > - use {READ,WRITE}_ONCE for arch_atomic64_{read,set} > - use asm-generic/bitops/atomic.h instead of __test_and_*_bit > - removed duplicated includes > - rewrite xchg and cmpxchg in C using builtins for acswap insn Thanks for those changes. I see one issue below (instantiated a few times), but other than that this looks good to me. [...] > +#define ATOMIC64_RETURN_OP(op, c_op) \ > +static inline long arch_atomic64_##op##_return(long i, atomic64_t *v) \ > +{ \ > + long new, old, ret; \ > + \ > + do { \ > + old = v->counter; \ This should be arch_atomic64_read(v), in order to avoid the potential for the compiler to replay the access and introduce ABA races and other such problems. For details, see: https://lore.kernel.org/lkml/Y70SWXHDmOc3RhMd@osiris/ https://lore.kernel.org/lkml/Y71LoCIl+IFdy9D8@FVFF77S0Q05N/ I see that the generic 32-bit atomic code suffers from that issue, and we should fix it. > + new = old c_op i; \ > + ret = arch_cmpxchg(&v->counter, old, new); \ > + } while (ret != old); \ > + \ > + return new; \ > +} > + > +#define ATOMIC64_OP(op, c_op) \ > +static inline void arch_atomic64_##op(long i, atomic64_t *v) \ > +{ \ > + long new, old, ret; \ > + \ > + do { \ > + old = v->counter; \ Likewise, arch_atomic64_read(v) here. > + new = old c_op i; \ > + ret = arch_cmpxchg(&v->counter, old, new); \ > + } while (ret != old); \ > +} > + > +#define ATOMIC64_FETCH_OP(op, c_op) \ > +static inline long arch_atomic64_fetch_##op(long i, atomic64_t *v) \ > +{ \ > + long new, old, ret; \ > + \ > + do { \ > + old = v->counter; \ Likewise, arch_atomic64_read(v) here. > + new = old c_op i; \ > + ret = arch_cmpxchg(&v->counter, old, new); \ > + } while (ret != old); \ > + \ > + return old; \ > +} > + > +#define ATOMIC64_OPS(op, c_op) \ > + ATOMIC64_OP(op, c_op) \ > + ATOMIC64_RETURN_OP(op, c_op) \ > + ATOMIC64_FETCH_OP(op, c_op) > + > +ATOMIC64_OPS(and, &) > +ATOMIC64_OPS(or, |) > +ATOMIC64_OPS(xor, ^) > +ATOMIC64_OPS(add, +) > +ATOMIC64_OPS(sub, -) > + > +#undef ATOMIC64_OPS > +#undef ATOMIC64_FETCH_OP > +#undef ATOMIC64_OP > + > +static inline int arch_atomic_add_return(int i, atomic_t *v) > +{ > + int new, old, ret; > + > + do { > + old = v->counter; Likewise, arch_atomic64_read(v) here. > + new = old + i; > + ret = arch_cmpxchg(&v->counter, old, new); > + } while (ret != old); > + > + return new; > +} > + > +static inline int arch_atomic_sub_return(int i, atomic_t *v) > +{ > + return arch_atomic_add_return(-i, v); > +} > + > +#include > + > +#endif /* _ASM_KVX_ATOMIC_H */ Otherwise, the atomics look good to me. Thanks, Mark. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv