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From: Conor Dooley <conor.dooley@microchip.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: <linux-riscv@lists.infradead.org>,
	<kvm-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
	'Heiko Stuebner ' <heiko@sntech.de>,
	'Krzysztof Kozlowski ' <krzysztof.kozlowski+dt@linaro.org>,
	'Anup Patel ' <apatel@ventanamicro.com>,
	'Palmer Dabbelt ' <palmer@dabbelt.com>,
	'Atish Patra ' <atishp@rivosinc.com>,
	'Paul Walmsley ' <paul.walmsley@sifive.com>,
	'Albert Ou ' <aou@eecs.berkeley.edu>,
	'Rob Herring ' <robh@kernel.org>,
	'Jisheng Zhang ' <jszhang@kernel.org>
Subject: Re: [PATCH v3 2/6] dt-bindings: riscv: Document cboz-block-size
Date: Mon, 30 Jan 2023 12:25:39 +0000	[thread overview]
Message-ID: <Y9e3Q5M8J8pTWZja@wendy> (raw)
In-Reply-To: <20230130120128.1349464-3-ajones@ventanamicro.com>


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Hey!

On Mon, Jan 30, 2023 at 01:01:24PM +0100, Andrew Jones wrote:
> The Zicboz operation (cbo.zero) operates on a block-size defined
> for the cpu-core. While we already have the riscv,cbom-block-size
> property, it only provides the block size for Zicbom operations.
> Even though it's likely Zicboz and Zicbom will use the same size,
> that's not specified.

If you end up respinning for some other reason, perhaps:
s/that's not specified/that's not required by the specification/ or
some other wording to that effect?
I'm assuming by "specified" you're referring to the cmobase spec, but
that wording I don't think is particular clear.

> Create another property specifically for
> Zicboz.
> 
> Cc: Rob Herring <robh@kernel.org>
> Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> index c6720764e765..f4ee70f8e1cf 100644
> --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> @@ -72,6 +72,11 @@ properties:
>      description:
>        The blocksize in bytes for the Zicbom cache operations.
>  
> +  riscv,cboz-block-size:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    description:
> +      The blocksize in bytes for the Zicboz cache operations.
> +

I was happy with either keeping them apart entirely or a having this one
default to the value of cbom-block-size, so:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.


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  reply	other threads:[~2023-01-30 17:48 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-30 12:01 [PATCH v3 0/6] RISC-V: Apply Zicboz to clear_page Andrew Jones
2023-01-30 12:01 ` [PATCH v3 1/6] RISC-V: Factor out body of riscv_init_cbom_blocksize loop Andrew Jones
2023-01-30 12:01 ` [PATCH v3 2/6] dt-bindings: riscv: Document cboz-block-size Andrew Jones
2023-01-30 12:25   ` Conor Dooley [this message]
2023-01-30 22:57   ` Rob Herring
2023-01-30 12:01 ` [PATCH v3 3/6] RISC-V: Add Zicboz detection and block size parsing Andrew Jones
2023-01-30 12:01 ` [PATCH v3 4/6] RISC-V: Use Zicboz in clear_page when available Andrew Jones
2023-02-02  4:35   ` Palmer Dabbelt
2023-02-02  7:41     ` Andrew Jones
2023-01-30 12:01 ` [PATCH v3 5/6] RISC-V: KVM: Provide UAPI for Zicboz block size Andrew Jones
2023-01-30 12:01 ` [PATCH v3 6/6] RISC-V: KVM: Expose Zicboz to the guest Andrew Jones
2023-01-30 18:30 ` [PATCH v3 0/6] RISC-V: Apply Zicboz to clear_page Jeff Law
2023-01-30 18:47   ` Andrew Jones
2023-01-30 18:55 ` Jeff Law

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