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From: Conor Dooley <conor.dooley@microchip.com>
To: Atish Patra <atishp@rivosinc.com>
Cc: <linux-kernel@vger.kernel.org>, Albert Ou <aou@eecs.berkeley.edu>,
	Andrew Jones <ajones@ventanamicro.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Eric Lin <eric.lin@sifive.com>, Guo Ren <guoren@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>, <kvm-riscv@lists.infradead.org>,
	<kvm@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Will Deacon <will@kernel.org>
Subject: Re: [PATCH v4 07/14] RISC-V: KVM: Add skeleton support for perf
Date: Thu, 2 Feb 2023 11:33:53 +0000	[thread overview]
Message-ID: <Y9ufoeZ/4obZDJz6@wendy> (raw)
In-Reply-To: <20230201231250.3806412-8-atishp@rivosinc.com>


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On Wed, Feb 01, 2023 at 03:12:43PM -0800, Atish Patra wrote:
> This patch only adds barebone structure of perf implementation. Most of
> the function returns zero at this point and will be implemented
> fully in the future.
> 
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> +/* Per virtual pmu counter data */
> +struct kvm_pmc {
> +	u8 idx;
> +	struct perf_event *perf_event;
> +	uint64_t counter_val;

CI also complained that here, and elsewhere, you used uint64_t rather
than u64. Am I missing a reason for not using the regular types?

Thanks,
Conor.

> +	union sbi_pmu_ctr_info cinfo;
> +	/* Event monitoring status */
> +	bool started;

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  parent reply	other threads:[~2023-02-02 11:34 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-01 23:12 [PATCH v4 00/14] KVM perf support Atish Patra
2023-02-01 23:12 ` [PATCH v4 01/14] perf: RISC-V: Define helper functions expose hpm counter width and count Atish Patra
2023-02-02 14:59   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 02/14] perf: RISC-V: Improve privilege mode filtering for perf Atish Patra
2023-02-01 23:12 ` [PATCH v4 03/14] RISC-V: Improve SBI PMU extension related definitions Atish Patra
2023-02-02  4:00   ` Anup Patel
2023-02-02 15:01   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 04/14] RISC-V: KVM: Define a probe function for SBI extension data structures Atish Patra
2023-02-02 15:14   ` Andrew Jones
2023-02-02 15:16     ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 05/14] RISC-V: KVM: Return correct code for hsm stop function Atish Patra
2023-02-02 15:26   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 06/14] RISC-V: KVM: Modify SBI extension handler to return SBI error code Atish Patra
2023-02-02  4:01   ` Anup Patel
2023-02-02  8:52     ` Anup Patel
2023-02-02 15:56   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 07/14] RISC-V: KVM: Add skeleton support for perf Atish Patra
2023-02-02  4:02   ` Anup Patel
2023-02-02 11:33   ` Conor Dooley [this message]
2023-02-03  8:04     ` Atish Patra
2023-02-03  8:08       ` Conor Dooley
2023-02-02 17:03   ` Andrew Jones
2023-02-03  8:47     ` Atish Patra
2023-02-05  7:37       ` Atish Patra
2023-02-06  9:22         ` Andrew Jones
2023-02-06 11:39           ` Andrew Jones
2023-02-07  9:20             ` Atish Patra
2023-02-01 23:12 ` [PATCH v4 08/14] RISC-V: KVM: Add SBI PMU extension support Atish Patra
2023-02-02  7:52   ` Conor Dooley
2023-02-02 17:29   ` Andrew Jones
2023-02-03  9:07     ` Atish Patra
2023-02-01 23:12 ` [PATCH v4 09/14] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Atish Patra
2023-02-02 17:30   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 10/14] RISC-V: KVM: Disable all hpmcounter access for VS/VU mode Atish Patra
2023-02-01 23:12 ` [PATCH v4 11/14] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra
2023-02-01 23:12 ` [PATCH v4 12/14] RISC-V: KVM: Implement perf support without sampling Atish Patra
2023-02-02 18:44   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 13/14] RISC-V: KVM: Support firmware events Atish Patra
2023-02-02 11:40   ` Conor Dooley
2023-02-03 10:14   ` Andrew Jones
2023-02-01 23:12 ` [PATCH v4 14/14] RISC-V: KVM: Increment firmware pmu events Atish Patra
2023-02-02 18:48   ` Andrew Jones

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