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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id w8sm2666505ots.25.2021.09.20.15.00.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Sep 2021 15:00:39 -0700 (PDT) Received: (nullmailer pid 863268 invoked by uid 1000); Mon, 20 Sep 2021 22:00:38 -0000 Date: Mon, 20 Sep 2021 17:00:38 -0500 From: Rob Herring To: Krzysztof Kozlowski Cc: Paul Walmsley , Albert Ou , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Palmer Dabbelt , Rob Herring Subject: Re: [RESEND PATCH] dt-bindings: riscv: correct e51 and u54-mc CPU bindings Message-ID: References: <20210920132559.151678-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210920132559.151678-1-krzysztof.kozlowski@canonical.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210920_150046_534785_F382F3EB X-CRM114-Status: GOOD ( 14.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 20 Sep 2021 15:25:59 +0200, Krzysztof Kozlowski wrote: > All existing boards with sifive,e51 and sifive,u54-mc use it on top of > sifive,rocket0 compatible: > > arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: cpu@0: compatible: 'oneOf' conditional failed, one must be fixed: > ['sifive,e51', 'sifive,rocket0', 'riscv'] is too long > Additional items are not allowed ('riscv' was unexpected) > Additional items are not allowed ('sifive,rocket0', 'riscv' were unexpected) > 'riscv' was expected > > Signed-off-by: Krzysztof Kozlowski > > --- > > Hi Rob, > > You previously acked this patch but I think it will be easier if you > take it directly. > > Best regards, > Krzysztof > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > Applied, thanks! _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv