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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id v12sm6067213otk.43.2022.01.18.19.14.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Jan 2022 19:14:50 -0800 (PST) Received: (nullmailer pid 2571074 invoked by uid 1000); Wed, 19 Jan 2022 03:14:49 -0000 Date: Tue, 18 Jan 2022 21:14:49 -0600 From: Rob Herring To: conor.dooley@microchip.com Cc: linux-crypto@vger.kernel.org, linus.walleij@linaro.org, linux-gpio@vger.kernel.org, bin.meng@windriver.com, lee.jones@linaro.org, ivan.griffin@microchip.com, robh+dt@kernel.org, paul.walmsley@sifive.com, atishp@rivosinc.com, a.zummo@towertech.it, linux-rtc@vger.kernel.org, aou@eecs.berkeley.edu, jassisinghbrar@gmail.com, devicetree@vger.kernel.org, thierry.reding@gmail.com, lewis.hanly@microchip.com, geert@linux-m68k.org, linux-i2c@vger.kernel.org, broonie@kernel.org, alexandre.belloni@bootlin.com, heiko@sntech.de, daire.mcnamara@microchip.com, palmer@dabbelt.com, bgolaszewski@baylibre.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-pwm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, linux-spi@vger.kernel.org, krzysztof.kozlowski@canonical.com, u.kleine-koenig@pengutronix.de Subject: Re: [PATCH v4 08/14] dt-bindings: pwm: add microchip corepwm binding Message-ID: References: <20220117110755.3433142-1-conor.dooley@microchip.com> <20220117110755.3433142-9-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220117110755.3433142-9-conor.dooley@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220118_191451_921513_C0052030 X-CRM114-Status: UNSURE ( 9.17 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, 17 Jan 2022 11:07:49 +0000, conor.dooley@microchip.com wrote: > From: Conor Dooley > > Add device tree bindings for the Microchip fpga fabric based "core" PWM > controller. > > Signed-off-by: Conor Dooley > --- > .../bindings/pwm/microchip,corepwm.yaml | 75 +++++++++++++++++++ > 1 file changed, 75 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml > Reviewed-by: Rob Herring _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv