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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id s64sm1248611oos.0.2022.02.04.14.45.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Feb 2022 14:45:07 -0800 (PST) Received: (nullmailer pid 3322192 invoked by uid 1000); Fri, 04 Feb 2022 22:45:06 -0000 Date: Fri, 4 Feb 2022 16:45:06 -0600 From: Rob Herring To: Conor.Dooley@microchip.com Cc: linus.walleij@linaro.org, brgl@bgdev.pl, jassisinghbrar@gmail.com, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, lee.jones@linaro.org, a.zummo@towertech.it, alexandre.belloni@bootlin.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, geert@linux-m68k.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-pwm@vger.kernel.org, linux-rtc@vger.kernel.org, linux-riscv@lists.infradead.org, krzysztof.kozlowski@canonical.com, bin.meng@windriver.com, heiko@sntech.de, Lewis.Hanly@microchip.com, Daire.McNamara@microchip.com, Ivan.Griffin@microchip.com, atishp@rivosinc.com Subject: Re: [PATCH v5 03/12] dt-bindings: i2c: add bindings for microchip mpfs i2c Message-ID: References: <20220131114726.973690-1-conor.dooley@microchip.com> <20220131114726.973690-4-conor.dooley@microchip.com> <84e1d43f-4d3d-1501-5bc1-c982272e1ce3@microchip.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <84e1d43f-4d3d-1501-5bc1-c982272e1ce3@microchip.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220204_144509_265918_4E6C05AE X-CRM114-Status: GOOD ( 18.92 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Jan 31, 2022 at 03:55:32PM +0000, Conor.Dooley@microchip.com wrote: > On 31/01/2022 15:39, Rob Herring wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > On Mon, Jan 31, 2022 at 5:45 AM wrote: > >> > >> From: Conor Dooley > >> > >> Add device tree bindings for the i2c controller on > >> the Microchip PolarFire SoC. > >> > >> Reviewed-by: Rob Herring > >> > > > > There should not be a blank line here. > > > > Also, tags should be in chronological order typically. If Daire sent > > this patch out with my tag, then the order is correct. If I gave it on > > a version you sent, then it goes between Daire's and your S-o-b which > > is the case here. > Oh, thanks. Probably been messing this up right/left/centre. > > On another note, I know I'm still missing a RB still on some of the > bindings, but what is the acceptance path for this series? > Any left over bindings not taken by subsystems via yourself and the dts > changes via Palmer's tree? They should go via subsystems. I can take if you want, but not with missing dependencies. I need my tree working. Rob _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv