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[66.90.148.213]) by smtp.gmail.com with ESMTPSA id g9sm454209oac.3.2022.02.09.10.47.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Feb 2022 10:47:17 -0800 (PST) Received: (nullmailer pid 675998 invoked by uid 1000); Wed, 09 Feb 2022 18:47:16 -0000 Date: Wed, 9 Feb 2022 12:47:16 -0600 From: Rob Herring To: Heiko Stuebner Cc: hch@lst.de, linux-kernel@vger.kernel.org, maxime@cerno.tech, huffman@cadence.com, liush@allwinnertech.com, xinhaoqu@huawei.com, behrensj@mit.edu, anup@brainfault.org, jscheid@ventanamicro.com, allen.baum@esperantotech.com, philipp.tomsich@vrull.eu, aou@eecs.berkeley.edu, wefu@redhat.com, arnd@arndb.de, andrea.mondelli@huawei.com, paul.walmsley@sifive.com, linux-riscv@lists.infradead.org, robh+dt@kernel.org, cmuellner@linux.com, drew@beagleboard.org, rtrauben@gmail.com, samuel@sholland.org, palmer@dabbelt.com, atishp@atishpatra.org, mick@ics.forth.gr, devicetree@vger.kernel.org, gfavor@ventanamicro.com, wens@csie.org, guoren@kernel.org Subject: Re: [PATCH v6 11/14] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt Message-ID: References: <20220209123800.269774-1-heiko@sntech.de> <20220209123800.269774-12-heiko@sntech.de> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220209123800.269774-12-heiko@sntech.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220209_104720_360433_AE8FF107 X-CRM114-Status: GOOD ( 10.92 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, 09 Feb 2022 13:37:57 +0100, Heiko Stuebner wrote: > From: Wei Fu > > Previous patch has added svpbmt in arch/riscv and add "riscv,svpmbt" > in the DT mmu node. Update dt-bindings related property here. > > Signed-off-by: Wei Fu > Co-developed-by: Guo Ren > Signed-off-by: Guo Ren > Signed-off-by: Heiko Stuebner > Cc: Anup Patel > Cc: Palmer Dabbelt > Cc: Rob Herring > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > Reviewed-by: Rob Herring _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv