Re: [PATCH 0/3] unified way to use static key and optimize pgtable_l4_enabled

[Jisheng Zhang <jszhang@kernel.org>]

On Mon, Feb 14, 2022 at 03:52:44PM -0800, Palmer Dabbelt wrote:
> On Tue, 25 Jan 2022 08:50:33 PST (-0800), jszhang@kernel.org wrote:
> > Currently, riscv has several features why may not be supported on all
> > riscv platforms, for example, FPU, SV48 and so on. To support unified
> > kernel Image style, we need to check whether the feature is suportted
> > or not. If the check sits at hot code path, then performance will be
> > impacted a lot. static key can be used to solve the issue. In the
> > past FPU support has been converted to use static key mechanism. I
> > believe we will have similar cases in the future. For example, the
> > SV48 support can take advantage of static key[1].
> > 
> > patch1 introduces an unified mechanism to use static key for riscv cpu
> > features.
> > patch2 converts has_cpu() to use the mechanism.
> > patch3 uses the mechanism to optimize pgtable_l4_enabled.
> > 
> > [1] http://lists.infradead.org/pipermail/linux-riscv/2021-December/011164.html
> > 
> > Jisheng Zhang (3):
> >   riscv: introduce unified static key mechanism for CPU features
> >   riscv: replace has_fpu() with system_supports_fpu()
> >   riscv: convert pgtable_l4_enabled to static key
> 
> I see some build failures from LKP, but I don't see a v2.  LMK if I missed
> it.

Hi Palmer,

I also saw the build failure due to RV32, fixing it is easy but I have
some thoughts/questions here after reading Atish's "fraemework for RISC-V
ISA extensions" series. 

Hi All,

I'm considering how to support cpu features or new ISA extensions.
IMHO, we will need some static keys for ISA extenstions as well as
the cpu features. for example:

if (static_branch_likely(&has_isa_ext_foo))
	do_something;

So I have a big question here about CPU features VS. ISA extensions:

1. Is CPU feature == ISA extension?
If yes, then it seems we'd better rebase this series on the ISA
extension series. If no, which is the super set? If CPU feature
is the super set, then if one kind of future cpu feature is implemented
via. the ISA extension, do we need to combine the cpu feature bitmap
with the ISA extension bitmap? how?

2. Is SV48 considered as riscv ISA extension?

I will also comment in Atish's series.

Thanks

> 
> > 
> >  arch/riscv/Makefile                 |   3 +
> >  arch/riscv/include/asm/cpufeature.h | 105 ++++++++++++++++++++++++++++
> >  arch/riscv/include/asm/pgalloc.h    |   8 +--
> >  arch/riscv/include/asm/pgtable-64.h |  21 +++---
> >  arch/riscv/include/asm/pgtable.h    |   3 +-
> >  arch/riscv/include/asm/switch_to.h  |   9 +--
> >  arch/riscv/kernel/cpu.c             |   2 +-
> >  arch/riscv/kernel/cpufeature.c      |  29 ++++++--
> >  arch/riscv/kernel/process.c         |   2 +-
> >  arch/riscv/kernel/signal.c          |   4 +-
> >  arch/riscv/mm/init.c                |  23 +++---
> >  arch/riscv/mm/kasan_init.c          |   6 +-
> >  arch/riscv/tools/Makefile           |  22 ++++++
> >  arch/riscv/tools/cpucaps            |   6 ++
> >  arch/riscv/tools/gen-cpucaps.awk    |  40 +++++++++++
> >  15 files changed, 234 insertions(+), 49 deletions(-)
> >  create mode 100644 arch/riscv/include/asm/cpufeature.h
> >  create mode 100644 arch/riscv/tools/Makefile
> >  create mode 100644 arch/riscv/tools/cpucaps
> >  create mode 100755 arch/riscv/tools/gen-cpucaps.awk

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