From: "Hongren (Zenithal) Zheng" <i@zenithal.me>
To: Atish Patra <atishp@rivosinc.com>, Palmer Dabbelt <palmer@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH] RISC-V: cpu.c: remove nonexistent ext from cpuinfo
Date: Tue, 26 Apr 2022 06:08:01 +0800 [thread overview]
Message-ID: <YmcbwYcSzwLSepWZ@Sun> (raw)
There are no single-letter B/K/J extentions,
as they are never ratified. For P, it is still in
progress and not ratified.
The ordering constraint of these placerholders is now removed
from the spec. By commit ("Delete more nonexistent
extensions from the naming constraints") of riscv/riscv-isa-manual
Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me>
---
arch/riscv/kernel/cpu.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index ccb617791e56..53a061ab0743 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -113,10 +113,8 @@ static void print_isa_ext(struct seq_file *f)
/*
* These are the only valid base (single letter) ISA extensions as per the spec.
* It also specifies the canonical order in which it appears in the spec.
- * Some of the extension may just be a place holder for now (B, K, P, J).
- * This should be updated once corresponding extensions are ratified.
*/
-static const char base_riscv_exts[13] = "imafdqcbkjpvh";
+static const char base_riscv_exts[9] = "imafdqcvh";
static void print_isa(struct seq_file *f, const char *isa)
{
--
2.35.1
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next reply other threads:[~2022-04-25 22:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-25 22:08 Hongren (Zenithal) Zheng [this message]
2022-05-18 8:40 ` [PATCH] RISC-V: cpu.c: remove nonexistent ext from cpuinfo Hongren (Zenithal) Zheng
2022-06-02 3:52 ` Palmer Dabbelt
2022-06-12 18:20 ` Hongren Zheng
2023-03-16 12:54 ` Hongren Zheng
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