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Wysocki" , "David S . Miller" , "Rafael J . Wysocki" Subject: Re: [PATCH V4 08/23] RISC-V: ACPI: Cache and retrieve the RINTC structure Message-ID: References: <20230404182037.863533-1-sunilvl@ventanamicro.com> <20230404182037.863533-9-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230405_204644_904448_A959A7F8 X-CRM114-Status: GOOD ( 27.72 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Apr 05, 2023 at 05:17:48PM +0200, Andrew Jones wrote: > On Tue, Apr 04, 2023 at 11:50:22PM +0530, Sunil V L wrote: > > RINTC structures in the MADT provide mapping between the hartid > > and the CPU. This is required many times even at run time like > > cpuinfo. So, instead of parsing the ACPI table every time, cache > > the RINTC structures and provide a function to get the correct > > RINTC structure for a given cpu. > > > > Signed-off-by: Sunil V L > > Acked-by: Rafael J. Wysocki > > --- > > arch/riscv/include/asm/acpi.h | 2 ++ > > arch/riscv/kernel/acpi.c | 60 +++++++++++++++++++++++++++++++++++ > > 2 files changed, 62 insertions(+) > > > > diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h > > index 9be52b6ffae1..1606dce8992e 100644 > > --- a/arch/riscv/include/asm/acpi.h > > +++ b/arch/riscv/include/asm/acpi.h > > @@ -59,6 +59,8 @@ static inline bool acpi_has_cpu_in_madt(void) > > > > static inline void arch_fix_phys_package_id(int num, u32 slot) { } > > > > +struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu); > > +u32 get_acpi_id_for_cpu(int cpu); > > #endif /* CONFIG_ACPI */ > > > > #endif /*_ASM_ACPI_H*/ > > diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c > > index 81d448c41714..40ab55309c70 100644 > > --- a/arch/riscv/kernel/acpi.c > > +++ b/arch/riscv/kernel/acpi.c > > @@ -24,6 +24,66 @@ EXPORT_SYMBOL(acpi_disabled); > > int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ > > EXPORT_SYMBOL(acpi_pci_disabled); > > > > +static struct acpi_madt_rintc cpu_madt_rintc[NR_CPUS]; > > + > > +static int acpi_parse_madt_rintc(union acpi_subtable_headers *header, const unsigned long end) > > +{ > > + struct acpi_madt_rintc *rintc = (struct acpi_madt_rintc *)header; > > + int cpuid; > > + > > + if (!(rintc->flags & ACPI_MADT_ENABLED)) > > + return 0; > > + > > + cpuid = riscv_hartid_to_cpuid(rintc->hart_id); > > + /* > > + * When CONFIG_SMP is disabled, mapping won't be created for > > + * all cpus. > > + * CPUs more than NR_CPUS, will be ignored. > > + */ > > + if (cpuid >= 0 && cpuid < NR_CPUS) > > + cpu_madt_rintc[cpuid] = *rintc; > > + > > + return 0; > > +} > > + > > +static int acpi_init_rintc_array(void) > > +{ > > + if (acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_madt_rintc, 0) > 0) > > + return 0; > > + > > + return -ENODEV; > > As Conor pointed out, the errors could be propagated from > acpi_table_parse_madt(), which could reduce this function to > > return acpi_table_parse_madt(ACPI_MADT_TYPE_RINTC, acpi_parse_madt_rintc, 0); > > where the '< 0' check would be in the caller below. That sounds good to > me, but then I'd take that a step further and just drop this helper > altogether. > Thanks, Conor, Drew. I used similar to how others have used acpi_table_parse_madt(). But your suggestion makes sense. Will remove the wrapper function also. Thanks, Sunil _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv