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From: Andrea Parri <parri.andrea@gmail.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] riscv,mmio: Use the generic implementation for the I/O accesses
Date: Wed, 12 Jul 2023 17:18:01 +0200	[thread overview]
Message-ID: <ZK7EKQjCQV7fNPSx@andrea> (raw)
In-Reply-To: <20230712-lesser-deflector-d18f7991477b@wendy>

On Wed, Jul 12, 2023 at 08:05:16AM +0100, Conor Dooley wrote:
> On Tue, Jul 11, 2023 at 03:33:48PM +0200, Andrea Parri wrote:
> > The current implementation of readX(), writeX() and their "relaxed"
> > variants, readX_relaxed() and writeX_relaxed(), matches the generic
> > implementation; remove the redundant code.
> > 
> > No functional change intended.
> > 
> > Signed-off-by: Andrea Parri <parri.andrea@gmail.com>
> 
> This fails to build for (64-bit, I didn't check 32-bit) nommu:
> arch/riscv/include/asm/timex.h:20:16: error: implicit declaration of function 'readq_relaxed' [-Werror=implicit-function-declaration]
> include/asm-generic/io.h:342:23: error: conflicting types for 'readq_relaxed'; have 'u64(const volatile void *)' {aka 'long long unsigned int(const volatile void *)'}

Thank you for the report, Conor.  Looking at it.

  Andrea

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  reply	other threads:[~2023-07-12 15:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-11 13:33 [PATCH 0/2] riscv,mmio: I/O barriers fixes and cleanups Andrea Parri
2023-07-11 13:33 ` [PATCH 1/2] riscv,mmio: Fix readX()-to-delay() ordering Andrea Parri
2023-07-11 13:33 ` [PATCH 2/2] riscv,mmio: Use the generic implementation for the I/O accesses Andrea Parri
2023-07-12  7:05   ` Conor Dooley
2023-07-12 15:18     ` Andrea Parri [this message]
2023-08-09 14:40 ` [PATCH 0/2] riscv,mmio: I/O barriers fixes and cleanups patchwork-bot+linux-riscv

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