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Hallyn" , kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-mips@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-security-module@vger.kernel.org, linux-kernel@vger.kernel.org, Chao Peng , Fuad Tabba , Jarkko Sakkinen , Yu Zhang , Vishal Annapurve , Ackerley Tng , Maciej Szmigiero , Vlastimil Babka , David Hildenbrand , Quentin Perret , Michael Roth , Wang , Liam Merwick , "Kirill A . Shutemov" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230720_132017_748320_A86EF374 X-CRM114-Status: GOOD ( 15.22 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Jul 20, 2023, Isaku Yamahata wrote: > On Thu, Jul 20, 2023 at 04:09:12PM +0800, > Yuan Yao wrote: > > > On Tue, Jul 18, 2023 at 04:44:51PM -0700, Sean Christopherson wrote: > > > @@ -2301,4 +2305,14 @@ static inline void kvm_account_pgtable_pages(void *virt, int nr) > > > /* Max number of entries allowed for each kvm dirty ring */ > > > #define KVM_DIRTY_RING_MAX_ENTRIES 65536 > > > > > > +#ifdef CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES > > > +static inline unsigned long kvm_get_memory_attributes(struct kvm *kvm, gfn_t gfn) > > > +{ > > > + return xa_to_value(xa_load(&kvm->mem_attr_array, gfn)); > > > +} > > > + > > > +bool kvm_arch_post_set_memory_attributes(struct kvm *kvm, > > > + struct kvm_gfn_range *range); > > > > Used but no definition in this patch, it's defined in next patch 09. > > How about add weak version in this patch and let ARCHs to overide it ? > > It is guarded by CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES. Yep. I don't love the ordering, e.g. this patch can't even be compile tested until later in the series, but I wanted to separate x86 usage from the generic support code. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv