Re: [v2, 0/5] riscv: support kernel-mode Vector

[Guo Ren <guoren@kernel.org>]

On Fri, Jul 21, 2023 at 11:28:50AM +0000, Andy Chiu wrote:
> This series provides support for running Vector code in kernel mode. The
> implementation is based on the v12 series of the Vector series, but with
> some additions. First, we introduce a mechanism to defer restoring
> Vector context for userspace programs (patch 1). This is similar to
> arm64 and x86's approaches when dealing with extra userspace register
> context. And it is benefitial to both Vector in user and kernel-mode.
> Then, patch 2, 3 add the kernel-mode Vector patch from v12 with minor
> modifications. At the end of the series, patch 4, 5 add supports for
> making kernel-mode Vector code preemptible. We do this by adding
> kernel-mode Vector context, and keeping track of the frame where V
> context is last valid. We believe that enabling preemption of running V
> is a critical path for getting V more generally available in the
> kernel-mode. Besides, with status.VS, we can easily tell if
> saving/restoring V is required. This reduce the level of cost when
> running SIMD in kernel mode as compared to other arches. Other arches
> usually do not have a way to tell if extra context is dirty. Thus, if
> they also want to support running preemptible code with extra registers,
> then they must save/restore extra context at each context switch even if
> registers are not dirty.
> 
> The series is tested by loading a kernel module on a preemptive kernel.
> The module launches multiple kworkers which run Vector operations and
> verifies with scalar code. Also, the module provides userspace intefaces
> via fops to verify if we can run Vector code on syscall path.
Would it be contributed to kernel tools/testing/selftests/riscv/?

> 
> Updated patches: 1, 2, 3, 4, 5
> New patches: -
> Unchanged patches: -
> Deleted patches: 6 (moved to 5)
> 
> Changelog v2:
>  - fix build issues
>  - Follow arm's way of starting kernel-mode simd code:
>    - add include/asm/simd.h and rename may_use_vector() ->
>      may_use_simd()
>    - return void in kernel_vector_begin(), and BUG_ON if may_use_simd()
>      fails
>  - Change naming scheme for functions/macros (Conor):
>    - remove KMV
>    - 's/rvv/vector/'
>    - 's/RISCV_ISA_V_PREEMPTIVE_KMV/RISCV_ISA_V_PREEMPTIVE/'
>    - 's/TIF_RISCV_V_KMV/TIF_RISCV_V_KERNEL_MODE/'
> 
> Changes from the vector v12 series (for patch 2, 3):
>  - return a failure code when kernel_vector_begin() fails.
>  - Do not immediately restore user's V context.
> 
> Andy Chiu (3):
>   riscv: sched: defer restoring Vector context for user
>   riscv: vector: do not pass task_struct into
>     riscv_v_vstate_{save,restore}()
>   riscv: vector: allow kernel-mode Vector with preemption
> 
> Greentime Hu (2):
>   riscv: Add support for kernel mode vector
>   riscv: Add vector extension XOR implementation
> 
>  arch/riscv/Kconfig                     |  10 ++
>  arch/riscv/include/asm/entry-common.h  |  13 +++
>  arch/riscv/include/asm/processor.h     |   2 +
>  arch/riscv/include/asm/simd.h          |  52 +++++++++
>  arch/riscv/include/asm/thread_info.h   |   6 +
>  arch/riscv/include/asm/vector.h        |  50 +++++++--
>  arch/riscv/include/asm/xor.h           |  82 ++++++++++++++
>  arch/riscv/kernel/Makefile             |   1 +
>  arch/riscv/kernel/asm-offsets.c        |   2 +
>  arch/riscv/kernel/entry.S              |  45 ++++++++
>  arch/riscv/kernel/kernel_mode_vector.c | 146 +++++++++++++++++++++++++
>  arch/riscv/kernel/process.c            |  10 +-
>  arch/riscv/kernel/ptrace.c             |   2 +-
>  arch/riscv/kernel/signal.c             |   4 +-
>  arch/riscv/kernel/vector.c             |   5 +-
>  arch/riscv/lib/Makefile                |   1 +
>  arch/riscv/lib/xor.S                   |  81 ++++++++++++++
>  17 files changed, 495 insertions(+), 17 deletions(-)
>  create mode 100644 arch/riscv/include/asm/simd.h
>  create mode 100644 arch/riscv/include/asm/xor.h
>  create mode 100644 arch/riscv/kernel/kernel_mode_vector.c
>  create mode 100644 arch/riscv/lib/xor.S
> 
> -- 
> 2.17.1
> 
> 
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