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From: John Watts To: Chen-Yu Tsai Subject: Re: [PATCH v3] riscv: dts: allwinner: d1: Add CAN controller nodes Message-ID: References: <20230807191952.2019208-1-contact@jookia.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230812_212356_366571_51AB828F X-CRM114-Status: GOOD ( 19.18 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Conor Dooley , Albert Ou , Samuel Holland , linux-kernel@vger.kernel.org, Jernej Skrabec , Rob Herring , Palmer Dabbelt , Krzysztof Kozlowski , Paul Walmsley , Maksim Kiselev , linux-riscv@lists.infradead.org, Marc Kleine-Budde , linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Sun, Aug 13, 2023 at 12:17:27PM +0800, Chen-Yu Tsai wrote: > > Signed-off-by: John Watts > > --- > > Changes in v3: > > - Set default pinctrl for can controller > > - Moved can nodes to proper location > > - Moved can pins to proper location > > > > .../boot/dts/allwinner/sunxi-d1s-t113.dtsi | 34 +++++++++++++++++++ > > 1 file changed, 34 insertions(+) > > > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > > index d59b4acf183a..24f2e70d5886 100644 > > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > > @@ -52,6 +52,18 @@ pio: pinctrl@2000000 { > > #gpio-cells = <3>; > > #interrupt-cells = <3>; > > > > + /omit-if-no-ref/ > > Just FYI this likely ends up doing nothing if you also have them > referenced through a default pinctrl setting. They end up always > referenced and always included. For the D1 series it looks like no > peripheral has default pinctrl setting given. > > We can still keep it though. It would help when future chip variants > specify different pinmuxes. Oops, thanks for pointing that out. I'll try to avoid that mistake in future. > The compatible string should be the first property. In other sunxi SoC dtsi > files, we put the pinctrl just before the "status" property if it's present > to specify a default pin muxing. Oh that makes sense. > > I can fix it up while applying. Please do! > ChenYu Thanks, John. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv