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b=uOFIXMTuEDDZzHghgMd/2KXKH2+SLpeDrAJMYRyDEcBiCUuBsUygrfbCUjZqqe1Pe jVDrug2/YNru5OmQ3LcYMMUOPFXI6AJbUx7madmz8SO2JUsaS+H4/d2F4XF91QZk6G 0/FCZxjRAlM0uF3//TsLN77lSdgAuv7bJW2B0brk05fk1Isbqtqj+jUkAY8q/EZUv6 TU+xKpTxrVyXr6HZSLiBJFaz0S1P/J1ANwgGzx2W9OItfKZBJLRxGxe6hCubsGoWhU AY6btcJQ735GLEGFS9pHN2IIRIw1HhGbzlDF7CtyXHrVGHs83mI6y+qMkciGgStDTu fjz5AyWEijx2w== Date: Sun, 27 Aug 2023 18:22:44 +0800 From: Jisheng Zhang To: Prabhakar Cc: Arnd Bergmann , Christoph Hellwig , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Anup Patel , Andrew Jones , linux-kernel@vger.kernel.org, Geert Uytterhoeven , Samuel Holland , linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Palmer Dabbelt , Guo Ren Subject: Re: [PATCH v3 2/3] riscv: dma-mapping: skip invalidation before bidirectional DMA Message-ID: References: <20230816232336.164413-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20230816232336.164413-3-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230816232336.164413-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230827_033435_638248_35CDF5B9 X-CRM114-Status: GOOD ( 19.51 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Aug 17, 2023 at 12:23:35AM +0100, Prabhakar wrote: > From: Arnd Bergmann > > For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned > first to let the device see data written by the CPU, and invalidated > after the transfer to let the CPU see data written by the device. > > riscv also invalidates the caches before the transfer, which does > not appear to serve any purpose. > > Signed-off-by: Arnd Bergmann > Reviewed-by: Conor Dooley > Reviewed-by: Lad Prabhakar > Acked-by: Palmer Dabbelt > Acked-by: Guo Ren > Signed-off-by: Lad Prabhakar > --- > v2->v3 > * No change > > v1->v2 > * Included RB and ACKs > --- > arch/riscv/mm/dma-noncoherent.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c > index 94614cf61cdd..fc6377a64c8d 100644 > --- a/arch/riscv/mm/dma-noncoherent.c > +++ b/arch/riscv/mm/dma-noncoherent.c > @@ -25,7 +25,7 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, > ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); > break; > case DMA_BIDIRECTIONAL: > - ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); > + ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); The code could be simplified a lot since after this patch, the action is always "clean". Thanks > break; > default: > break; > -- > 2.34.1 > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv