From: Yu-Chien Peter Lin <peterlin@andestech.com>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<aou@eecs.berkeley.edu>, <david@redhat.com>,
<akpm@linux-foundation.org>, <alexghiti@rivosinc.com>,
<bjorn@rivosinc.com>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/3] riscv: Improve PTDUMP to show RSW with non-zero value
Date: Thu, 21 Sep 2023 09:40:51 +0800 [thread overview]
Message-ID: <ZQufI18opHe8iYgi@APC323> (raw)
In-Reply-To: <20230920-pureblood-unwilling-f17aff1eef6a@wendy>
Hi Conor,
On Wed, Sep 20, 2023 at 10:55:30AM +0100, Conor Dooley wrote:
> On Wed, Sep 20, 2023 at 11:55:20AM +0800, Yu Chien Peter Lin wrote:
> > RSW field can be used to encode 2 bits of software
> > defined information. Currently, PTDUMP only prints
> > "RSW" when its value is 1 or 3.
> >
> > To fix this issue and improve the debugging experience
> > with PTDUMP, we redefine _PAGE_SPECIAL to its original
> > value and use _PAGE_SOFT as the RSW mask, allow it to
> > print the RSW with any non-zero value.
> >
> > This patch also removes the val from the struct prot_bits
> > as it is no longer needed.
> >
>
> Could you please add cover letters to multi-patch patchsets?
>
> Thanks,
> Conor.
Sure, will do.
Regards,
Peter Lin
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prev parent reply other threads:[~2023-09-21 1:41 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-20 3:55 [PATCH v3 1/3] riscv: Improve PTDUMP to show RSW with non-zero value Yu Chien Peter Lin
2023-09-20 3:55 ` [PATCH v3 2/3] riscv: Introduce PBMT field to PTDUMP Yu Chien Peter Lin
2023-09-20 9:12 ` Alexandre Ghiti
2023-09-20 3:55 ` [PATCH v3 3/3] riscv: Introduce NAPOT " Yu Chien Peter Lin
2023-09-20 9:14 ` Alexandre Ghiti
2023-09-20 9:10 ` [PATCH v3 1/3] riscv: Improve PTDUMP to show RSW with non-zero value Alexandre Ghiti
2023-09-20 9:55 ` Conor Dooley
2023-09-21 1:40 ` Yu-Chien Peter Lin [this message]
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