Re: [PATCH 3/6] mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520

Drew Fustini
2023-09-25T14:43:45Z

On Mon, Sep 25, 2023 at 01:35:36PM +0300, Adrian Hunter wrote:
> On 22/09/23 04:49, Drew Fustini wrote:
> > Add support for the mmc controller in the T-Head TH1520 with the new
> > compatible "thead,th1520-dwcmshc". Implement custom sdhci_ops for
> > set_uhs_signaling, reset, voltage_switch, and platform_execute_tuning.
> >
> > Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> > ---
> > drivers/mmc/host/sdhci-of-dwcmshc.c | 456 ++++++++++++++++++++++++++++++++++++
> > 1 file changed, 456 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 3a3bae6948a8..7294bf1afb7d 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -35,6 +35,26 @@
> > #define DWCMSHC_CARD_IS_EMMC BIT(0)
> > #define DWCMSHC_ENHANCED_STROBE BIT(8)
> > #define DWCMSHC_EMMC_ATCTRL 0x40
> > +/* Tuning and auto-tuning fields in AT_CTRL_R control register */
> > +#define AT_CTRL_AT_EN 0x1 /* autotuning is enabled */
> > +#define AT_CTRL_CI_SEL_SHIFT 0x1 /* bit 1 */
> > +#define AT_CTRL_CI_SEL 0x1 /* interval to drive center phase select */
> > +#define AT_CTRL_SWIN_TH_EN_SHIFT 0x2 /* bit 2 */
> > +#define AT_CTRL_SWIN_TH_EN 0x1 /* sampling window threshold enable */
> > +#define AT_CTRL_RPT_TUNE_ERR_SHIFT 0x3 /* bit 3 */
> > +#define AT_CTRL_RPT_TUNE_ERR 0x1 /* enable reporting framing errors */
> > +#define AT_CTRL_SW_TUNE_EN_SHIFT 0x4 /* bit 4 */
> > +#define AT_CTRL_SW_TUNE_EN 0x1 /* enable software managed tuning */
> > +#define AT_CTRL_WIN_EDGE_SEL_SHIFT 0x8 /* bits [11:8] */
> > +#define AT_CTRL_WIN_EDGE_SEL 0xf /* sampling window edge select */
> > +#define AT_CTRL_TUNE_CLK_STOP_EN_SHIFT 0x10 /* bit 16 */
> > +#define AT_CTRL_TUNE_CLK_STOP_EN 0x1 /* clocks stopped during phase code change */
> > +#define AT_CTRL_PRE_CHANGE_DLY_SHIFT 0x11 /* bits [18:17] */
> > +#define AT_CTRL_PRE_CHANGE_DLY 0x1 /* 2-cycle latency */
> > +#define AT_CTRL_POST_CHANGE_DLY_SHIFT 0x13 /* bits [20:19] */
> > +#define AT_CTRL_POST_CHANGE_DLY 0x3 /* 4-cycle latency */
> > +#define AT_CTRL_SWIN_TH_VAL_SHIFT 0x18 /* bits [31:24] */
> > +#define AT_CTRL_SWIN_TH_VAL 0x9 /* sampling window threshold */
>
> Here and elsewhere, please try to make use of BIT(), GENMASK(),
> FIELD_PREP(), FIELD_GET()

Thank you for the advice. FIELD_PREP() and FIELD_GET() look like they
can make the code simpler. I'll make use of those macros in the next
version.

thanks,
drew