* [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC @ 2023-10-19 13:58 Yu Chien Peter Lin 2023-10-20 7:26 ` Geert Uytterhoeven 0 siblings, 1 reply; 3+ messages in thread From: Yu Chien Peter Lin @ 2023-10-19 13:58 UTC (permalink / raw) To: geert+renesas, magnus.damm, robh+dt, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, linux-renesas-soc, devicetree, linux-riscv, linux-kernel Cc: prabhakar.mahadev-lad.rj, tim609, dylan, locus84, dminus, Yu Chien Peter Lin The Andes INTC allows AX45MP cores to handle custom local interrupts, such as the performance monitor overflow interrupt. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> --- Changes v1 -> v2: - New patch --- arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi index 8a726407fb76..a6345469e8c9 100644 --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi @@ -37,7 +37,7 @@ cpu0: cpu@0 { cpu0_intc: interrupt-controller { #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; + compatible = "andestech,cpu-intc"; interrupt-controller; }; }; -- 2.34.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC 2023-10-19 13:58 [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Yu Chien Peter Lin @ 2023-10-20 7:26 ` Geert Uytterhoeven 2023-10-20 8:17 ` Yu-Chien Peter Lin 0 siblings, 1 reply; 3+ messages in thread From: Geert Uytterhoeven @ 2023-10-20 7:26 UTC (permalink / raw) To: Yu Chien Peter Lin Cc: geert+renesas, magnus.damm, robh+dt, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, linux-renesas-soc, devicetree, linux-riscv, linux-kernel, prabhakar.mahadev-lad.rj, tim609, dylan, locus84, dminus Hi Yu, On Thu, Oct 19, 2023 at 4:01 PM Yu Chien Peter Lin <peterlin@andestech.com> wrote: > The Andes INTC allows AX45MP cores to handle custom local > interrupts, such as the performance monitor overflow interrupt. > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > --- > Changes v1 -> v2: > - New patch Thanks for your patch! > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > @@ -37,7 +37,7 @@ cpu0: cpu@0 { > > cpu0_intc: interrupt-controller { > #interrupt-cells = <1>; > - compatible = "riscv,cpu-intc"; > + compatible = "andestech,cpu-intc"; This compatible value is not documented. Perhaps it was introduced in an earlier patch in the series, to which I was not CCed? Threading is broken, so I can't easily find the whole series in lore: https://lore.kernel.org/all/20231019135810.3657665-1-peterlin@andestech.com/ > interrupt-controller; > }; > }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC 2023-10-20 7:26 ` Geert Uytterhoeven @ 2023-10-20 8:17 ` Yu-Chien Peter Lin 0 siblings, 0 replies; 3+ messages in thread From: Yu-Chien Peter Lin @ 2023-10-20 8:17 UTC (permalink / raw) To: Geert Uytterhoeven Cc: geert+renesas, magnus.damm, robh+dt, krzysztof.kozlowski+dt, conor+dt, paul.walmsley, palmer, aou, linux-renesas-soc, devicetree, linux-riscv, linux-kernel, prabhakar.mahadev-lad.rj, tim609, dylan, locus84, dminus Hi Geert, On Fri, Oct 20, 2023 at 09:26:31AM +0200, Geert Uytterhoeven wrote: > Hi Yu, > > On Thu, Oct 19, 2023 at 4:01 PM Yu Chien Peter Lin > <peterlin@andestech.com> wrote: > > The Andes INTC allows AX45MP cores to handle custom local > > interrupts, such as the performance monitor overflow interrupt. > > > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> > > --- > > Changes v1 -> v2: > > - New patch > > Thanks for your patch! > > > --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > > +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi > > @@ -37,7 +37,7 @@ cpu0: cpu@0 { > > > > cpu0_intc: interrupt-controller { > > #interrupt-cells = <1>; > > - compatible = "riscv,cpu-intc"; > > + compatible = "andestech,cpu-intc"; > > This compatible value is not documented. Perhaps it was introduced > in an earlier patch in the series, to which I was not CCed? > > Threading is broken, so I can't easily find the whole series in lore: > https://lore.kernel.org/all/20231019135810.3657665-1-peterlin@andestech.com/ Sorry, I'll send PATCH v3 with some fixes. Thanks for reminding me of this. Best regards, Peter Lin > > interrupt-controller; > > }; > > }; > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-10-20 8:18 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-10-19 13:58 [PATCH v2 04/10] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Yu Chien Peter Lin 2023-10-20 7:26 ` Geert Uytterhoeven 2023-10-20 8:17 ` Yu-Chien Peter Lin
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