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Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley , Andrew Jones , Atish Kumar Patra , Haibo Xu , Marc Zyngier Subject: Re: [RFC PATCH v2 11/21] PCI: MSI: Add helper function to set system wide MSI support Message-ID: References: <20231025202344.581132-1-sunilvl@ventanamicro.com> <20231025202344.581132-12-sunilvl@ventanamicro.com> <87a5s0yyje.ffs@tglx> <874ji7zz7a.ffs@tglx> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <874ji7zz7a.ffs@tglx> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231030_190050_827640_10F51A47 X-CRM114-Status: GOOD ( 20.89 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Oct 30, 2023 at 08:29:13PM +0100, Thomas Gleixner wrote: > On Mon, Oct 30 2023 at 23:24, Sunil V. L. wrote: > > On Mon, Oct 30, 2023 at 03:28:53PM +0100, Thomas Gleixner wrote: > > Just noting related discussion : > > https://www.spinics.net/lists/linux-serial/msg57616.html > > > > The MSI controller on RISC-V (IMSIC) is optional for the platform. So, > > when by default pci_msi_enable = 1 and the MSI controller is not > > discovered, we get stack trace like below. > > > > > So, what I did was, by default call pci_no_msi() to disable MSI and then > > call pci_set_msi() to enable when MSI controller is probed. > > Your taste sensors should have gone out of range ... > > > But I think Bjorn's suggestion to depend on PCI_BUS_FLAGS_NO_MSI may be > > better idea. In that case, we need to set bridge->msi_domain to true in > > pci_create_root_bus(). Let me know what do you prefer or if I am > > completely missing something here. > > That's definitely more sensible, but as I said in the other thread, Marc > is the one who did the PCI core/bridge setup magic and he is definitely > in a better position to answer that bridge->msi_domain question. > Thanks!. It looks like Marc introduced bridge->msi_domain in [1] for exactly the same problem we have with RISC-V + ACPI. Let me remove this hack and do similar to pci_host_common_probe() in next revision unless I get objections to that approach. Sorry, somehow my script didn't copy Marc in the series. Will make sure I copy him explicitly in next revision. [1] - https://lore.kernel.org/all/20210330151145.997953-12-maz@kernel.org/ Thanks! Sunil _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv