Re: [PATCH RT v2 0/3] riscv: add PREEMPT_RT support

From: Jisheng Zhang <jszhang@kernel.org>
To: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, tobias.schaffner@siemens.com,
	Arnd Bergmann <arnd@arndb.de>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH RT v2 0/3] riscv: add PREEMPT_RT support
Date: Tue, 31 Oct 2023 23:49:29 +0800	[thread overview]
Message-ID: <ZUEiCUxcd11inlRP@xhacker> (raw)
In-Reply-To: <20231031153242.k9tLdSby@linutronix.de>

On Tue, Oct 31, 2023 at 04:32:42PM +0100, Sebastian Andrzej Siewior wrote:
> On 2023-10-31 22:35:19 [+0800], Jisheng Zhang wrote:
> > This series is to add PREEMPT_RT support to riscv. Compared with last
> > year's try[1], there are two major changes:
> > 
> > 1. riscv has been converted to Generic Entry. And RT maintainers has
> > introduced PREEMPT_AUTO, so its support for riscv as well.
> > 
> > 2. three preparation patches(patch1/2/3 in [1]) has been merged in
> > mainline.
> 
> There is no third patch in the series, right? If so then the amount in
> shortlog is consistent with I received.

Yes there's no third patch. I didn't use the correct number in patch0's
subject.

> 
> > Jisheng Zhang (2):
> >   riscv: add PREEMPT_AUTO support
> >   riscv: allow to enable RT
> > 
> >  arch/riscv/Kconfig                   | 2 ++
> >  arch/riscv/include/asm/thread_info.h | 2 ++
> >  2 files changed, 4 insertions(+)
> 
> Sebastian

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