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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Mar 27, 2024 at 06:06:58PM +0000, Conor Dooley wrote: > Yo, > > On Tue, Feb 06, 2024 at 07:13:48PM +0000, Conor Dooley wrote: > > On Wed, Jan 31, 2024 at 09:26:00PM +0800, Jisheng Zhang wrote: > > > The Milkv Mars is a development board based on the Starfive JH7110 SoC. > > > The board features: > > > > > > - JH7110 SoC > > > - 1/2/4/8 GiB LPDDR4 DRAM > > > - AXP15060 PMIC > > > - 40 pin GPIO header > > > - 3x USB 3.0 host port > > > - 1x USB 2.0 host port > > > - 1x M.2 E-Key > > > - 1x eMMC slot > > > - 1x MicroSD slot > > > - 1x QSPI Flash > > > - 1x 1Gbps Ethernet port > > > - 1x HDMI port > > > - 1x 2-lane DSI and 1x 4-lane DSI > > > - 1x 2-lane CSI > > > > > > Add the devicetree file describing the currently supported features, > > > namely PMIC, UART, I2C, GPIO, SD card, QSPI Flash, eMMC and Ethernet. > > > > > > Signed-off-by: Jisheng Zhang > > > > Got a dtbs_check issue in the patchwork CI: > > > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rgmii-rxin-clock: 'clock-frequency' is a required property > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# > > +arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dtb: gmac1-rmii-refin-clock: 'clock-frequency' is a required property > > + from schema $id: http://devicetree.org/schemas/clock/fixed-clock.yaml# > > > > Can you fix that please? Also, I applied some patches the other day that > > seem to conflict quite a bit with the common board dts patch. Would you > > please do a rebase on top of that please? > > Been going through stuff on my todo list now that the merge window is > closed. Could you please resend this with the rebase done? Thanks for the reminding, I will rebase on 6.9-rc1 then send out the patches. > > Thanks, > Conor. _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv