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Fri, 10 May 2024 09:48:13 -0700 (PDT) Received: from ghost ([2601:647:5700:6860:629e:3f2:f321:6c]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6341134705dsm3256924a12.85.2024.05.10.09.48.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 May 2024 09:48:12 -0700 (PDT) Date: Fri, 10 May 2024 09:48:10 -0700 From: Charlie Jenkins To: Conor Dooley Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Song Liu , Xi Wang , =?iso-8859-1?Q?Bj=F6rn_T=F6pel?= , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Jessica Clarke , Andy Chiu , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/8] riscv: Support compiling the kernel with more extensions Message-ID: References: <20240507-compile_kernel_with_extensions-v2-0-722c21c328c6@rivosinc.com> <20240509-uptown-aging-5bdec4730d70@spud> <20240509-google-passing-3e7577235c44@spud> <20240510-okay-trade-8826cb134979@spud> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240510-okay-trade-8826cb134979@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240510_094818_010229_864976E3 X-CRM114-Status: GOOD ( 44.74 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, May 10, 2024 at 09:25:37AM +0100, Conor Dooley wrote: > On Thu, May 09, 2024 at 03:55:12PM -0700, Charlie Jenkins wrote: > > On Thu, May 09, 2024 at 11:08:34PM +0100, Conor Dooley wrote: > > > > Maybe if you read what I wrote you'd see what I was getting at, or maybe > > > not as I might not have been sufficiently clear. I'm not saying that this > > > particular optimisation is not worth having, but rather than I wanted to > > > > I seem to frequently give you the impression that I don't read what you > > say before responding. > > Does it happen frequently? I don't really recall it annoying me before. > > > What we each view as "important" in the kernel is > > different so we come from different places when approaching a problem. I > > respond in the way that I do not because I am not listening to you, but > > simply because I have a different opinion and I am not explaining that > > properly. > > If you're trying to describe a different opinion, responding to the bit > I was talking about, as you do below in your latest response is ideal. > Responding inline but not actually addressing the points I was making > did make me think you were [un]intentionally ignoring what I was trying > to say. > > > > see why this particular optimisation was worth maintaining 3 code paths > > > > I interpreted the "3 code paths" as with Zbb + 64 bit, with Zbb + 32 > > bit, and without Zbb. I directly responded to that by saying that we > > could eliminate all of the code paths that are not Zbb + 64 bit could be > > eliminated. I should have given performance numbers for these alternate > > cases too, and somebody should have asked. I agree that performance > > needs justification, and I understand that I did not provide ample > > justification in this patch. All other architectures optimized these > > code paths so I figured that was sufficient justification for riscv to > > do the same, but I understand that it is not. > > And hey, if you look at the commit in question, who acked it? I'm just > saying that I think we should have a higher standard going forwards. > > > > for but the commit message does not detail any of the benefits, and > > > looking at the cover I discovered that it was not tested in hardware nor > > > seemingly with a real test case. > > > > It's hard when riscv currently is very focused on microcontrollers. > > Zbb is actually implemented in hardware, so testing it in the real world > is not a barrier. Palmer probably has a JH7110 board that someone gave > to him is not using... > > > These changes are in order to help future hardware that is more focused > > about performance. > > I'm not replying to most of your response rn, got other stuff to do, but > what I was trying to say is that I think the point at which optimisations > for future hardware/extensions should be merged is the point at which > those extensions are no longer future. > > > That's why I contribute this upstream with the hope > > that other people, like me, care about performance. > > Heh, that could be read to mean that I do not care about performance, > which wouldn't be true. > > Cheers, > Conor. This is all a good perspective for me to keep in mind when I look into performance improvements. I will try to get my hands on some hardware that I can use to test so I can have some real numbers! - Charlie _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv