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Mon, 13 May 2024 10:33:40 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1ef0b9d4733sm81989285ad.54.2024.05.13.10.33.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 May 2024 10:33:39 -0700 (PDT) Date: Mon, 13 May 2024 10:33:34 -0700 From: Deepak Gupta To: Alexandre Ghiti Cc: paul.walmsley@sifive.com, rick.p.edgecombe@intel.com, broonie@kernel.org, Szabolcs.Nagy@arm.com, kito.cheng@sifive.com, keescook@chromium.org, ajones@ventanamicro.com, conor.dooley@microchip.com, cleger@rivosinc.com, atishp@atishpatra.org, bjorn@rivosinc.com, alexghiti@rivosinc.com, samuel.holland@sifive.com, conor@kernel.org, linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-kselftest@vger.kernel.org, corbet@lwn.net, palmer@dabbelt.com, aou@eecs.berkeley.edu, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, oleg@redhat.com, akpm@linux-foundation.org, arnd@arndb.de, ebiederm@xmission.com, Liam.Howlett@oracle.com, vbabka@suse.cz, lstoakes@gmail.com, shuah@kernel.org, brauner@kernel.org, andy.chiu@sifive.com, jerry.shih@sifive.com, hankuan.chen@sifive.com, greentime.hu@sifive.com, evan@rivosinc.com, xiao.w.wang@intel.com, charlie@rivosinc.com, apatel@ventanamicro.com, mchitale@ventanamicro.com, dbarboza@ventanamicro.com, sameo@rivosinc.com, shikemeng@huaweicloud.com, willy@infradead.org, vincent.chen@sifive.com, guoren@kernel.org, samitolvanen@google.com, songshuaishuai@tinylab.org, gerg@kernel.org, heiko@sntech.de, bhe@redhat.com, jeeheng.sia@starfivetech.com, cyy@cyyself.name, maskray@google.com, ancientmodern4@gmail.com, mathis.salmen@matsal.de, cuiyunhui@bytedance.com, bgray@linux.ibm.com, mpe@ellerman.id.au, baruch@tkos.co.il, alx@kernel.org, david@redhat.com, catalin.marinas@arm.com, revest@chromium.org, josh@joshtriplett.org, shr@devkernel.io, deller@gmx.de, omosnace@redhat.com, ojeda@kernel.org, jhubbard@nvidia.com Subject: Re: [PATCH v3 12/29] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Message-ID: References: <20240403234054.2020347-1-debug@rivosinc.com> <20240403234054.2020347-13-debug@rivosinc.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240513_103342_405456_484B7351 X-CRM114-Status: UNSURE ( 9.66 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Sun, May 12, 2024 at 06:28:59PM +0200, Alexandre Ghiti wrote: > >On 04/04/2024 01:35, Deepak Gupta wrote: >>pte_mkwrite creates PTEs with WRITE encodings for underlying arch. >>Underlying arch can have two types of writeable mappings. One that can be >>written using regular store instructions. Another one that can only be >>written using specialized store instructions (like shadow stack stores). >>pte_mkwrite can select write PTE encoding based on VMA range (i.e. >>VM_SHADOW_STACK) >> >>Signed-off-by: Deepak Gupta >>--- >> arch/riscv/include/asm/pgtable.h | 7 +++++++ >> arch/riscv/mm/pgtable.c | 21 +++++++++++++++++++++ >> 2 files changed, 28 insertions(+) >> >>diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h >>index 6362407f1e83..9b837239d3e8 100644 >>--- a/arch/riscv/include/asm/pgtable.h >>+++ b/arch/riscv/include/asm/pgtable.h >>@@ -403,6 +403,10 @@ static inline pte_t pte_wrprotect(pte_t pte) >> /* static inline pte_t pte_mkread(pte_t pte) */ >>+struct vm_area_struct; >>+pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma); >>+#define pte_mkwrite pte_mkwrite >>+ >> static inline pte_t pte_mkwrite_novma(pte_t pte) >> { >> return __pte(pte_val(pte) | _PAGE_WRITE); >>@@ -694,6 +698,9 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd) >> return pte_pmd(pte_mkyoung(pmd_pte(pmd))); >> } >>+pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma); >>+#define pmd_mkwrite pmd_mkwrite >>+ >> static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) >> { >> return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd))); >>diff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c >>index ef887efcb679..c84ae2e0424d 100644 >>--- a/arch/riscv/mm/pgtable.c >>+++ b/arch/riscv/mm/pgtable.c >>@@ -142,3 +142,24 @@ pmd_t pmdp_collapse_flush(struct vm_area_struct *vma, >> return pmd; >> } >> #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ >>+ >>+pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma) >>+{ >>+ if (vma_is_shadow_stack(vma->vm_flags)) >>+ return pte_mkwrite_shstk(pte); >>+ >>+ pte = pte_mkwrite_novma(pte); > > >I would directly return pte_mkwrite_novma(pte) instead of assigning pte. noted. > > >>+ >>+ return pte; >>+} >>+ >>+pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma) >>+{ >>+ if (vma_is_shadow_stack(vma->vm_flags)) >>+ return pmd_mkwrite_shstk(pmd); >>+ >>+ pmd = pmd_mkwrite_novma(pmd); > > >Ditto here. noted here too. > > >>+ >>+ return pmd; >>+} >>+ > > >Otherwise: > >Reviewed-by: Alexandre Ghiti > >Thanks, > >Alex > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv