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Wed, 19 Jun 2024 09:30:12 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7062cb0a402sm1665445b3a.33.2024.06.19.09.30.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jun 2024 09:30:12 -0700 (PDT) Date: Wed, 19 Jun 2024 09:30:10 -0700 From: Deepak Gupta To: Jisheng Zhang Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/6] riscv: convert bottom half of exception handling to C Message-ID: References: <20240616170553.2832-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240616170553.2832-1-jszhang@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240619_093018_207593_419F2936 X-CRM114-Status: GOOD ( 17.52 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Mon, Jun 17, 2024 at 01:05:47AM +0800, Jisheng Zhang wrote: >For readability, maintainability and future scalability, convert the >bottom half of the exception handling to C. > >During the conversion, I found Anton fixed a performance issue >and my patches will touch the same exception asm code, so I include >Anton's patch for completeness. I also cooked a similar patch to avoid >corrupting the RAS in ret_from_fork() per the inspiration. nit: Probably corruption is wrong word here giving the notion that software got some capability to corrupt uarch structures. It's simply mismatched # of call and # of rets. Imbalance (instead of calling it corruption) in return address stack (RAS) leading to incorret predictions on return. > >Mostly the assembly code is converted to C in a relatively >straightforward manner. > >However, there are two modifications I need to mention: > >1. the CSR_CAUSE reg reading and saving is moved to the C code >because we need the cause to dispatch the exception handling, >if we keep the cause reading and saving, we either pass it to >do_traps() via. 2nd param or get it from pt_regs which an extra >memory load is needed, I don't like any of the two solutions becase >the exception handling sits in hot code path, every instruction >matters. > >2.To cope with SIFIVE_CIP_453 errata, it looks like we don't need >alternative mechanism any more after the asm->c convertion. Just >replace the excp_vect_table two entries. > > > >Anton Blanchard (1): > riscv: Improve exception and system call latency > >Jisheng Zhang (5): > riscv: avoid corrupting the RAS > riscv: convert bottom half of exception handling to C > riscv: errata: remove ALT_INSN_FAULT and ALT_PAGE_FAULT > riscv: errata: sifive: remove NOMMU handling > riscv: remove asmlinkage from updated functions > > arch/riscv/errata/sifive/errata.c | 25 +++++++--- > arch/riscv/errata/sifive/errata_cip_453.S | 4 -- > arch/riscv/include/asm/asm-prototypes.h | 7 +-- > arch/riscv/include/asm/errata_list.h | 21 ++------ > arch/riscv/kernel/entry.S | 61 ++--------------------- > arch/riscv/kernel/stacktrace.c | 4 +- > arch/riscv/kernel/traps.c | 57 ++++++++++++++++++--- > 7 files changed, 81 insertions(+), 98 deletions(-) > >-- >2.43.0 > > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv