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Wed, 19 Jun 2024 11:15:08 -0700 (PDT) Received: from x1 ([2601:1c2:1802:170:7627:e2a7:42c9:f02c]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-705cc967334sm10993307b3a.57.2024.06.19.11.15.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jun 2024 11:15:08 -0700 (PDT) Date: Wed, 19 Jun 2024 11:15:06 -0700 From: Drew Fustini To: Conor Dooley Cc: Jisheng Zhang , Guo Ren , Fu Wei , Yangtao Li , Thomas Bonnefille , Emil Renner Berthing , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/6] clk: thead: Add support for TH1520 AP_SUBSYS clock controller Message-ID: References: <20240615-th1520-clk-v1-0-3ba4978c4d6b@tenstorrent.com> <20240619-tapping-jaundice-471811929d96@spud> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20240619-tapping-jaundice-471811929d96@spud> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240619_111510_855831_99C0E428 X-CRM114-Status: GOOD ( 16.09 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Jun 19, 2024 at 12:12:30PM +0100, Conor Dooley wrote: > On Sat, Jun 15, 2024 at 06:54:29PM -0700, Drew Fustini wrote: > > This series adds support for the AP sub-system clock controller in the > > T-Head TH1520 [1]. Yangtao Li originally submitted this series in May > > 2023 [2]. Jisheng made additional improvements and then passed on the > > work in progress to me. > > One thing I noticed on the dts side is that the GPIO controllers have no > clocks provided. Does the AP sub-system clock controller provide their > clocks too? Good question. I see that dwapb_get_clks() in drivers/gpio/gpio-dwapb.c does call devm_clk_bulk_get_optional() for "bus" and "db". There doesn't seem to be to many in-tree examples of clocks being defined for gpio controllers with compatible "snps,dw-apb-gpio", but I do see that k210.dtsi defines K210_CLK_APB0 for "bus" and K210_CLK_GPIO for "db". >From the TH1520 System User Manual, I do see the gpio related clocks in Section 4.4.2.2 AP_SUBSYS. The peripheral clock gate control register (PERI_CLK_CFG) has: Bit 20: GPIO3_CLK_EN Bit 8: GPIO0_CLK_EN Bit 7: GPIO1_CLK_EN Bit 6: GPIO2_CLK_EN I will add these gates to the clk-th1520-ap.c and reference them from the gpio controller nodes. Since each gpio controller will only have one clock, do you think I can omit the clock-names property? Thanks, Drew Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv