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* [PATCH v2 0/1] Enable SPCR table for console output on RISC-V
@ 2024-05-02  7:37 Sia Jee Heng
  2024-05-02  7:37 ` [PATCH v2 1/1] RISC-V: ACPI: " Sia Jee Heng
  2024-07-25 13:20 ` [PATCH v2 0/1] " patchwork-bot+linux-riscv
  0 siblings, 2 replies; 4+ messages in thread
From: Sia Jee Heng @ 2024-05-02  7:37 UTC (permalink / raw)
  To: linux-kernel, linux-riscv
  Cc: aou, jeeheng.sia, rafael.j.wysocki, conor.dooley, palmer,
	paul.walmsley, ajones

The ACPI SPCR code has been used to enable console output for ARM64 and
X86. The same code can be reused for RISC-V. Furthermore, SPCR table is
mandated for headless system as outlined in the RISC-V BRS
Specification, chapter 6.

Changes in v2:
- Added code to handle early_init_dt_scan_chosen_stdout().

Sia Jee Heng (1):
  RISC-V: ACPI: Enable SPCR table for console output on RISC-V

 arch/riscv/Kconfig       |  1 +
 arch/riscv/kernel/acpi.c | 12 +++++++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)


base-commit: 0106679839f7c69632b3b9833c3268c316c0a9fc
-- 
2.34.1


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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2024-07-25 13:21 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-05-02  7:37 [PATCH v2 0/1] Enable SPCR table for console output on RISC-V Sia Jee Heng
2024-05-02  7:37 ` [PATCH v2 1/1] RISC-V: ACPI: " Sia Jee Heng
2024-07-09  4:49   ` Sunil V L
2024-07-25 13:20 ` [PATCH v2 0/1] " patchwork-bot+linux-riscv

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