From: Sunil V L <sunilvl@ventanamicro.com>
To: "Rafael J . Wysocki" <rafael@kernel.org>
Cc: Will Deacon <will@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Len Brown <lenb@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Anup Patel <anup@brainfault.org>,
Thomas Gleixner <tglx@linutronix.de>,
Samuel Holland <samuel.holland@sifive.com>,
Robert Moore <robert.moore@intel.com>,
Conor Dooley <conor.dooley@microchip.com>,
Haibo Xu <haibo1.xu@intel.com>,
Andrew Jones <ajones@ventanamicro.com>,
Atish Kumar Patra <atishp@rivosinc.com>,
Drew Fustini <dfustini@tenstorrent.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
acpica-devel@lists.linux.dev
Subject: Re: [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support
Date: Mon, 12 Aug 2024 06:37:33 +0530 [thread overview]
Message-ID: <ZrlgVUXC_dCW9ISM@sunil-laptop> (raw)
In-Reply-To: <20240812005929.113499-1-sunilvl@ventanamicro.com>
On Mon, Aug 12, 2024 at 06:29:12AM +0530, Sunil V L wrote:
> This series adds support for the below ECR approved by ASWG.
> 1) MADT - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing
>
> The series primarily enables irqchip drivers for RISC-V ACPI based
> platforms.
>
> The series can be broadly categorized like below.
>
> 1) PCI ACPI related functions are migrated from arm64 to common file so
> that we don't need to duplicate them for RISC-V.
>
> 2) Added support for re-ordering the probe of interrupt controllers when
> IRQCHIP_ACPI_DECLARE is used.
>
> 3) To ensure probe order between interrupt controllers and devices,
> implicit dependency is created similar to when _DEP is present.
>
> 4) ACPI support added in RISC-V interrupt controller drivers.
>
> Changes since v7:
> 1) Updated commit messages as per feedback from Bjorn on patches 2, 3 and 8.
> 2) Addressed Anup Patel's comments.
> 3) Added Tested-by tag from Björn Töpe which I missed to add in previous version.
> 4) Rebased to 6.11-rc3 and updated the RB tags from Anup.
>
> Changes since v6:
> 1) Update to commit message/code comments as per feedback from Bjorn.
> 2) Rebased to 6.11-rc1.
>
> Changes since v5:
> 1) Addressed feedback from Thomas.
> 2) Created separate patch for refactoring DT code in IMSIC
> 3) Separated a fix in riscv-intc irqchip driver and sent
> separately. This series depends on that patch [1].
> 4) Dropped serial driver patch since it depends on Andy's
> refactoring series [2]. RISC-V patches will be sent
> separately later once Andy series get accepted.
> 5) Rebased to v6.10-rc1 which has AIA DT patches.
> 6) Updated tags.
>
> Changes since RFC v4:
> 1) Removed RFC tag as the RFCv4 design looked reasonable.
> 2) Dropped PCI patch needed to avoid warning when there is no MSI
> controller. This will be sent later separately after the
> current series.
> 3) Dropped PNP handling of _DEP since there is new ACPI ID for
> generic 16550 UART. Added the serial driver patch instead.
> 4) Rebased to latest linux-next.
> 5) Reordered/squashed patches in the series
>
> Changes since RFC v3:
> 1) Moved to _DEP method instead of fw_devlink.
> 2) PLIC/APLIC driver probe using namespace devices.
> 3) Handling PNP devices as part of clearing dependency.
> 4) Rebased to latest linux-next to get AIA DT drivers.
>
> Changes since RFC v2:
> 1) Introduced fw_devlink for ACPI nodes for IRQ dependency.
> 2) Dropped patches in drivers which are not required due to
> fw_devlink support.
> 3) Dropped pci_set_msi() patch and added a patch in
> pci_create_root_bus().
> 4) Updated pnp_irq() patch so that none of the actual PNP
> drivers need to change.
>
> Changes since RFC v1:
> 1) Abandoned swnode approach as per Marc's feedback.
> 2) To cope up with AIA series changes which changed irqchip driver
> probe from core_initcall() to platform_driver, added patches
> to support deferred probing.
> 3) Rebased on top of Anup's AIA v11 and added tags.
>
Hi Rafael,
Hope you are back this week!.
This series has spent quite a bit of time now on the list. As you are
aware, few clarifications like _PIC codes are also done now. There is
no major change after you had agreed for the design. So, can this be
considered for the next release please?
Thanks!
Sunil
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-08-12 2:15 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-12 0:59 [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-08-12 0:59 ` [PATCH v8 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-08-12 18:09 ` Bjorn Helgaas
2024-08-14 5:32 ` Sunil V L
2024-08-12 0:59 ` [PATCH v8 02/17] ACPI: scan: Add a weak arch_sort_irqchip_probe() to order the IRQCHIP probe Sunil V L
2024-08-12 0:59 ` [PATCH v8 03/17] ACPI: bus: Add acpi_riscv_init() function Sunil V L
2024-08-12 0:59 ` [PATCH v8 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-08-12 0:59 ` [PATCH v8 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-08-12 0:59 ` [PATCH v8 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-08-12 0:59 ` [PATCH v8 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-08-12 0:59 ` [PATCH v8 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-08-22 21:44 ` Bjorn Helgaas
2024-08-23 6:33 ` Sunil V L
2024-08-23 17:45 ` Bjorn Helgaas
2024-08-12 0:59 ` [PATCH v8 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-08-12 0:59 ` [PATCH v8 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-08-12 0:59 ` [PATCH v8 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-08-12 0:59 ` [PATCH v8 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-08-12 0:59 ` [PATCH v8 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-08-12 0:59 ` [PATCH v8 14/17] irqchip/riscv-imsic-state: Create separate function for DT Sunil V L
2024-08-12 0:59 ` [PATCH v8 15/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-08-12 0:59 ` [PATCH v8 16/17] irqchip/riscv-aplic: " Sunil V L
2024-08-12 0:59 ` [PATCH v8 17/17] irqchip/sifive-plic: " Sunil V L
2024-08-12 1:07 ` Sunil V L [this message]
2024-08-26 15:25 ` [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support Thomas Gleixner
2024-08-26 16:15 ` Rafael J. Wysocki
2024-08-26 17:13 ` Sunil V L
2024-08-26 17:27 ` Rafael J. Wysocki
2024-08-26 21:17 ` Thomas Gleixner
2024-08-27 16:20 ` Rafael J. Wysocki
2024-08-27 17:04 ` Sunil V L
2024-08-27 17:12 ` Rafael J. Wysocki
2024-08-27 17:31 ` Sunil V L
2024-08-27 17:56 ` Rafael J. Wysocki
2024-08-27 18:12 ` Sunil V L
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZrlgVUXC_dCW9ISM@sunil-laptop \
--to=sunilvl@ventanamicro.com \
--cc=acpica-devel@lists.linux.dev \
--cc=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@rivosinc.com \
--cc=bhelgaas@google.com \
--cc=conor.dooley@microchip.com \
--cc=dfustini@tenstorrent.com \
--cc=haibo1.xu@intel.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=rafael@kernel.org \
--cc=robert.moore@intel.com \
--cc=samuel.holland@sifive.com \
--cc=tglx@linutronix.de \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox