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[71.34.69.82]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20b37da2195sm1594075ad.104.2024.09.26.11.38.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2024 11:38:17 -0700 (PDT) Date: Thu, 26 Sep 2024 11:38:15 -0700 From: Drew Fustini To: Andrew Lunn Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Jisheng Zhang , Maxime Coquelin , Emil Renner Berthing , Drew Fustini , Guo Ren , Fu Wei , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v2 0/3] Add the dwmac driver support for T-HEAD TH1520 SoC Message-ID: References: <20240926-th1520-dwmac-v2-0-f34f28ad1dc9@tenstorrent.com> <5e379911-e3de-478c-b785-61dbcc9627b1@lunn.ch> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <5e379911-e3de-478c-b785-61dbcc9627b1@lunn.ch> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240926_113818_756952_4C1655B3 X-CRM114-Status: GOOD ( 25.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Thu, Sep 26, 2024 at 08:23:12PM +0200, Andrew Lunn wrote: > > Regarding rx and tx internal delays, that same section in the manual > > doesn't specify what unit is represented by the delay_ctrl bit field in > > GMAC_RXCLK_DELAY_CTRL and GMAC_TXCLK_DELAY_CTRL. It is only 5 bits and > > a max value of 31 seems too small to represent picoseconds. The vendor > > kernel [2] uses properties named "rx-clk-delay" and "tx-clk-delay" but > > doesn't indicate any units. I see ti,dp83867.yaml adds vendor specific > > rx and tx delay properties so that is what I've now done in this series. > > Note: the hardware default value of 0 for delay_ctrl works okay for the > > TH1520 hardware that I have. > > I assume you are talking about RGMII delays here? > > Do you have a board which needs to set these delays? In general, linux > has the PHY provide the 2ns delay. You only need the MAC to add the > delays if a PHY is being used which cannot add the needed > delays. Occasionally you need to fine tune the delay, and the MAC > delays can then be interesting. But since you have no idea what the > units are, i would prefer to simply hard code it to 0, unless is it > really needed. > > Andrew Yes, this is for the RGMII delays. None of the TH1520 boards that I have seem to need this. The hardware reset value is 0 which seems to work okay. I'll remove these custom properties in the next revision. Thanks, Drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv