From: Ben Dooks <ben.dooks@sifive.com>
To: Zong Li <zong.li@sifive.com>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
palmer@dabbelt.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, greentime.hu@sifive.com,
conor.dooley@microchip.com, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE
Date: Tue, 30 Aug 2022 08:59:43 +0100 [thread overview]
Message-ID: <a0425472-00ed-81dc-e98d-fbccc1e95575@sifive.com> (raw)
In-Reply-To: <20220829062202.3287-1-zong.li@sifive.com>
On 29/08/2022 07:21, Zong Li wrote:
> Since composible cache may be L3 cache if private L2 cache exists, we
> should use its original name "composible cache" to prevent confusion.
>
> This patchset contains the modification which is related to ccache, such
> as DT binding and EDAC driver.
>
> Greentime Hu (1):
> soc: sifive: l2 cache: Rename SiFive L2 cache to composible cache.
>
> Zong Li (2):
> dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache
> EDAC/sifive: use sifive_ccache instead of sifive_l2
>
> ...ifive-l2-cache.yaml => sifive-ccache.yaml} | 6 +-
> drivers/edac/Kconfig | 2 +-
> drivers/edac/sifive_edac.c | 12 +-
> drivers/soc/sifive/Kconfig | 7 +-
> drivers/soc/sifive/Makefile | 2 +-
> drivers/soc/sifive/sifive_ccache.c | 221 ++++++++++++++++
> drivers/soc/sifive/sifive_l2_cache.c | 237 ------------------
> include/soc/sifive/sifive_ccache.h | 16 ++
> include/soc/sifive/sifive_l2_cache.h | 16 --
> 9 files changed, 253 insertions(+), 266 deletions(-)
> rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive-ccache.yaml} (92%)
> create mode 100644 drivers/soc/sifive/sifive_ccache.c
> delete mode 100644 drivers/soc/sifive/sifive_l2_cache.c
> create mode 100644 include/soc/sifive/sifive_ccache.h
> delete mode 100644 include/soc/sifive/sifive_l2_cache.h
Is this series available on a git branch anywhere, I have at least
one other cleanup I was doing in a similar move to rename and make
it usable as the l3 cache.
I gave the series a quick review and did not find any issues so far.
--
Ben
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next prev parent reply other threads:[~2022-08-30 8:01 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-29 6:21 [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE Zong Li
2022-08-29 6:22 ` [PATCH 1/3] dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache Zong Li
2022-08-29 6:45 ` Conor.Dooley
2022-08-29 7:38 ` Zong Li
2022-08-29 18:42 ` Rob Herring
2022-08-30 2:57 ` Zong Li
2022-10-07 2:58 ` Palmer Dabbelt
2022-10-07 3:51 ` Zong Li
2022-08-29 6:22 ` [PATCH 2/3] soc: sifive: l2 cache: Rename " Zong Li
2022-08-29 7:05 ` Conor.Dooley
2022-08-29 8:40 ` Zong Li
2022-08-30 8:41 ` Conor.Dooley
2022-08-31 5:31 ` Zong Li
2022-08-30 8:18 ` Ben Dooks
2022-08-29 6:22 ` [PATCH 3/3] EDAC/sifive: use sifive_ccache instead of sifive_l2 Zong Li
2022-10-07 2:58 ` Palmer Dabbelt
2022-08-30 7:59 ` Ben Dooks [this message]
2022-08-31 8:23 ` [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE Zong Li
2022-08-30 8:26 ` [PATCH] soc: sifive: ccache: reduce printing on init Ben Dooks
2022-08-30 16:30 ` Conor.Dooley
2022-08-30 17:03 ` Ben Dooks
2022-08-31 5:22 ` Zong Li
2022-08-31 15:55 ` Ben Dooks
2022-09-01 8:34 ` Zong Li
2022-08-30 8:36 ` [PATCH] dt-bindings: sifive-ccache: fix cache level for l3 cache Ben Dooks
2022-08-30 12:47 ` Rob Herring
2022-08-30 12:51 ` [RESEND PATCH] " Ben Dooks
2022-08-30 12:56 ` Conor.Dooley
2022-08-30 12:58 ` Ben Dooks
2022-08-30 13:49 ` Conor.Dooley
2022-08-30 16:49 ` Ben Dooks
2022-08-30 17:08 ` Conor.Dooley
2022-08-31 5:17 ` Zong Li
2022-08-31 6:25 ` Conor.Dooley
2022-09-02 19:36 ` Rob Herring
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