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Sun, 01 Jun 2025 10:40:41 -0700 (PDT) Received: from x1 ([97.120.245.255]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-747afeab6b2sm6352890b3a.57.2025.06.01.10.40.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Jun 2025 10:40:40 -0700 (PDT) Date: Sun, 1 Jun 2025 10:40:38 -0700 From: Drew Fustini To: Michal Wilczynski Cc: Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: Re: [PATCH v3 5/8] riscv: dts: thead: th1520: Add missing reset controller header include Message-ID: References: <20250530-apr_14_for_sending-v3-0-83d5744d997c@samsung.com> <20250530-apr_14_for_sending-v3-5-83d5744d997c@samsung.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250530-apr_14_for_sending-v3-5-83d5744d997c@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250601_104042_309092_1B00DF7F X-CRM114-Status: GOOD ( 17.49 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, May 30, 2025 at 12:23:52AM +0200, Michal Wilczynski wrote: > TH1520_RESET_ID_GPU_CLKGEN and TH1520_RESET_ID_GPU are required for GPU > power sequencing to work. To make these symbols available, add the > necessary include for the T-HEAD TH1520 reset controller bindings. > > This change was dropped during conflict resolution [1]. > > [1] - https://lore.kernel.org/all/aAvfn2mq0Ksi8DF2@x1/ > > Signed-off-by: Michal Wilczynski > --- > arch/riscv/boot/dts/thead/th1520.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index 1db0054c4e093400e9dbebcee5fcfa5b5cae6e32..bdbb1b985b0b76cf669a9bf40c6ec37258329056 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > > / { > compatible = "thead,th1520"; > > -- > 2.34.1 > Thanks for adding the header back now that there is no longer a conflict. I'll look at the rest of this series and the rust pwm series soon, but I just want to send a quick Rb on this patch right now. Reviewed-by: Drew Fustini _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv