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[97.120.250.80]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b31c84be11fsm2584945a12.78.2025.06.18.19.20.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jun 2025 19:20:37 -0700 (PDT) Date: Wed, 18 Jun 2025 19:20:35 -0700 From: Drew Fustini To: Michal Wilczynski Cc: Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: Re: [PATCH v5 6/8] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node Message-ID: References: <20250618-apr_14_for_sending-v5-0-27ed33ea5c6f@samsung.com> <20250618-apr_14_for_sending-v5-6-27ed33ea5c6f@samsung.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20250618-apr_14_for_sending-v5-6-27ed33ea5c6f@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250618_192038_925574_85118824 X-CRM114-Status: GOOD ( 18.40 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Wed, Jun 18, 2025 at 12:22:12PM +0200, Michal Wilczynski wrote: > Add the "gpu-clkgen" reset property to the AON device tree node. This > allows the AON power domain driver to detect the capability to power > sequence the GPU and spawn the necessary pwrseq-thead-gpu auxiliary > driver for managing the GPU's complex power sequence. > > This commit also adds the prerequisite > dt-bindings/reset/thead,th1520-reset.h include to make the > TH1520_RESET_ID_GPU_CLKGEN available. This include was previously > dropped during a conflict resolution [1]. > > Link: https://lore.kernel.org/all/aAvfn2mq0Ksi8DF2@x1/ [1] > > Reviewed-by: Ulf Hansson > Signed-off-by: Michal Wilczynski > --- > arch/riscv/boot/dts/thead/th1520.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index 1db0054c4e093400e9dbebcee5fcfa5b5cae6e32..f3f5db0201ab8c0306d4d63072a1573431e51893 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > > / { > compatible = "thead,th1520"; > @@ -234,6 +235,8 @@ aon: aon { > compatible = "thead,th1520-aon"; > mboxes = <&mbox_910t 1>; > mbox-names = "aon"; > + resets = <&rst TH1520_RESET_ID_GPU_CLKGEN>; > + reset-names = "gpu-clkgen"; > #power-domain-cells = <1>; > }; > > > -- > 2.34.1 > Reviewed-by: Drew Fustini _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv