From: Drew Fustini <fustini@kernel.org>
To: Icenowy Zheng <uwu@icenowy.me>
Cc: Guo Ren <guoren@kernel.org>, Fu Wei <wefu@redhat.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Michal Wilczynski <m.wilczynski@samsung.com>,
Yao Zi <ziyao@disroot.org>, Han Gao <rabenda.cn@gmail.com>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] clk: thead: add support for enabling/disabling PLLs
Date: Thu, 14 Aug 2025 17:19:13 -0700 [thread overview]
Message-ID: <aJ59AfgQNHUpMM7x@x1> (raw)
In-Reply-To: <20250813072702.2176993-2-uwu@icenowy.me>
On Wed, Aug 13, 2025 at 03:27:00PM +0800, Icenowy Zheng wrote:
> The 2nd control word of T-Head TH1520 PLLs contains a bit to put the VCO
> into reset state, which means disabling the PLL.
>
> Some PLLs are put to disabled state by the bootloader, and the clock
> driver should be able to enable them.
>
> Add support for enabling/disabling PLLs. PLLs other than DPU ones are
> set CLK_IS_CRITICAL to prevent killing the system -- they're meant to
> drive CPU or system buses (even the GMAC/Video ones are driving arbitrary
> buses).
Do you think there is a way in the future to allow disabling PLLs for
run-time power management? I think it is more important right now to
get hardware peripherals working upstream like you are doing, but I was
curious if there is the potential to do something more granular in the
future.
> Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
> ---
> No changes in v2.
>
> drivers/clk/thead/clk-th1520-ap.c | 38 +++++++++++++++++++++++++++----
> 1 file changed, 33 insertions(+), 5 deletions(-)
Reviewed-by: Drew Fustini <fustini@kernel.org>
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next prev parent reply other threads:[~2025-08-15 1:07 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-13 7:26 [PATCH v2 0/3] clk: thead: Changes to TH1520 clock driver for disp Icenowy Zheng
2025-08-13 7:27 ` [PATCH v2 1/3] clk: thead: add support for enabling/disabling PLLs Icenowy Zheng
2025-08-15 0:19 ` Drew Fustini [this message]
2025-08-13 7:27 ` [PATCH v2 2/3] clk: thead: support changing DPU pixel clock rate Icenowy Zheng
2025-08-15 0:32 ` Drew Fustini
2025-08-15 2:23 ` Troy Mitchell
2025-08-15 3:27 ` Icenowy Zheng
2025-08-13 7:27 ` [PATCH v2 3/3] clk: thead: th1520-ap: set all AXI clocks to CLK_IS_CRITICAL Icenowy Zheng
2025-08-15 0:36 ` Drew Fustini
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