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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Sep 02, 2025 at 08:55:48AM +0100, Valentina Fernandez wrote: > Add a minimal device tree for the Microchip PolarFire SoC Discovery Kit. > The Discovery Kit is a cost-optimized board based on PolarFire SoC > MPFS095T and features: > > - 1 GB DDR4x16 > - 1x Gigabit Ethernet > - 3x UARTs > - Raspberry Pi connector > - mikroBus connector > - microSD card connector > > Link: https://www.microchip.com/en-us/development-tool/mpfs-disco-kit > Signed-off-by: Valentina Fernandez > --- > arch/riscv/boot/dts/microchip/Makefile | 1 + > .../dts/microchip/mpfs-disco-kit-fabric.dtsi | 58 ++++++ > .../boot/dts/microchip/mpfs-disco-kit.dts | 190 ++++++++++++++++++ > 3 files changed, 249 insertions(+) > create mode 100644 arch/riscv/boot/dts/microchip/mpfs-disco-kit-fabric.dtsi > create mode 100644 arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts ... > diff --git a/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts b/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts > new file mode 100644 > index 000000000000..c068b9bb5bfd > --- /dev/null > +++ b/arch/riscv/boot/dts/microchip/mpfs-disco-kit.dts ... > +&mbox { > + status = "okay"; > +}; > + > +&mmc { > + bus-width = <4>; > + disable-wp; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + sd-uhs-sdr104; I think sd-uhs-sdr104 implies sd-uhs-sdr{12,25,50}, thus the latter three properties could be dropped. > + no-1-8-v; > + status = "okay"; > +}; Best regards, Yao Zi _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv