Re: [PATCH v1 1/3] iommu/riscv: Add iommu perf driver

郭亚星
2025-09-18T03:21:20Z

[Sorry, I tried switching a new email client and made some settings...]

On 9/17/2025 8:10 PM, Will Deacon wrote:
> [nit: your email client has made a big mess of the thread here]
>
> On Tue, Sep 16, 2025 at 06:27:23PM +0800, guoyaxing@bosc.ac.cn wrote:
>>> PMU drivers are better placed under drivers/perf/
>>
>> I did a quick reading of SMMU pmu driver in drivers/perf/. However, If
>> the RISC-V IOMMU PMU driver is placed under drivers/perf/ as the SMMU did,
>> it would cause an overlap in the iomem resource region between the two
>> devices(iommu & iommu pmu), because it needs to share interrupt-related
>> registers (such as the IPSR register) with the main IOMMU driver.
>
> Is that not something you can resolve with IRQF_SHARED?
>

Actually IOMMU perf is using stand-along interrupt, so might not need
IRQF_SHARED with IOMMU driver.

What I mean is the IOMMU and IOMMU perf share the same registers, such
as IPSR. This could result in overlap on this iomem regions between
them, which is highly undesirable.

For now, two ideas come to my mind:
1. Integrate IOMMU perf functionality into IOMMU driver, just as
previous version patch.

2. Let IOMMU driver export external api for IOMMU perf
(to obtain virtual address of IPSR register) for perf related operations.

So what's your suggestion?

> Will

Yaxing Guo