Re: [PATCH 5/8] spi: fsl-qspi: allot 1KB per chip

From: Frank Li <Frank.li@nxp.com>
To: Alex Elder <elder@riscstar.com>
Cc: han.xu@nxp.com, broonie@kernel.org, dlan@gentoo.org,
	guodong@riscstar.com, linux-spi@vger.kernel.org,
	imx@lists.linux.dev, spacemit@lists.linux.dev,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/8] spi: fsl-qspi: allot 1KB per chip
Date: Mon, 20 Oct 2025 15:20:41 -0400	[thread overview]
Message-ID: <aPaLibm+oVKSDbL9@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20251020165152.666221-6-elder@riscstar.com>

On Mon, Oct 20, 2025 at 11:51:48AM -0500, Alex Elder wrote:
> In fsl_qspi_default_setup(), four registers define the size
> of blocks of data to written to each of four chips that
> comprise SPI NOR flash storage.  They are currently defined
> to be the same as the AHB buffer size (which is always 1KB).
>
> The SpacemiT QSPI has an AHB buffer size of 512 bytes, but
> requires these four sizes to be multiples of 1024 bytes.

I think it'd better to add field at fsl_qspi_devtype_data, like
sfa_size.

sz = q->devtype_data->sfa_size ? q->devtype_data->sfa_size : q->devtype_data->ahb_buf_size.

qspi_writel(q, addr_offset + 1 * sz, base + QUADSPI_SFA1AD);
...

Frank
>
> Rather than add a new quirk to support this scenario, just
> define the four sizes to be 1KB rather than being dependent
> on the AHB buffer size.
>
> Signed-off-by: Alex Elder <elder@riscstar.com>
> ---
>  drivers/spi/spi-fsl-qspi.c | 17 +++++++----------
>  1 file changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c
> index 703a7df394c00..9ecb756b33dba 100644
> --- a/drivers/spi/spi-fsl-qspi.c
> +++ b/drivers/spi/spi-fsl-qspi.c
> @@ -795,17 +795,14 @@ static int fsl_qspi_default_setup(struct fsl_qspi *q)
>  	 * In HW there can be a maximum of four chips on two buses with
>  	 * two chip selects on each bus. We use four chip selects in SW
>  	 * to differentiate between the four chips.
> -	 * We use ahb_buf_size for each chip and set SFA1AD, SFA2AD, SFB1AD,
> -	 * SFB2AD accordingly.
> +	 *
> +	 * We use 1K for each chip and set SFA1AD, SFA2AD, SFB1AD, SFB2AD
> +	 * accordingly.
>  	 */
> -	qspi_writel(q, q->devtype_data->ahb_buf_size + addr_offset,
> -		    base + QUADSPI_SFA1AD);
> -	qspi_writel(q, q->devtype_data->ahb_buf_size * 2 + addr_offset,
> -		    base + QUADSPI_SFA2AD);
> -	qspi_writel(q, q->devtype_data->ahb_buf_size * 3 + addr_offset,
> -		    base + QUADSPI_SFB1AD);
> -	qspi_writel(q, q->devtype_data->ahb_buf_size * 4 + addr_offset,
> -		    base + QUADSPI_SFB2AD);
> +	qspi_writel(q, addr_offset + 1 * SZ_1K, base + QUADSPI_SFA1AD);
> +	qspi_writel(q, addr_offset + 2 * SZ_1K, base + QUADSPI_SFA2AD);
> +	qspi_writel(q, addr_offset + 3 * SZ_1K, base + QUADSPI_SFB1AD);
> +	qspi_writel(q, addr_offset + 4 * SZ_1K, base + QUADSPI_SFB2AD);
>
>  	q->selected = -1;
>
> --
> 2.48.1
>

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