From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1A20E6F08C for ; Tue, 23 Dec 2025 13:04:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RQJlYqJbeq6gGk6/CIBowsDAj1cF3lbayaxTcfF4SB0=; b=QI+ddsY5MNguuk tXJRg6GHqjL0EyidaSGZ4r5eQ2hbMp8SeDB9HtXZ81XZkAw4pEr/N/6VA/YlvjFyXSXUBEB5wNVAV ChATVWQ7cKZjyWIyw59DSkOXmZJB/yModkMtUGnp/PK9NsSg/83T8QkbFwrK2zwRPuDrBteP5cvXq V1TGihMg8S0ASSIy6EdNEzQ68499J4JNxF0NoqkYNIaGUm7qifCF3qIX2MztzOX6UZSyb9ukp43qs x/bGJb4gMaHp+IMGqrnFGwY/4uGP6bKRfefusDQVLp3/FR7gpOiszQT9+8d0X1C2S/+urMYx2ANXc G3ne8zqvylDO8IxnVCPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vY23L-0000000FW2m-3xEj; Tue, 23 Dec 2025 13:03:51 +0000 Received: from mail54.out.titan.email ([44.195.191.162]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vY23J-0000000FW2H-0nLq for linux-riscv@lists.infradead.org; Tue, 23 Dec 2025 13:03:50 +0000 Received: from localhost (localhost [127.0.0.1]) by smtp-out.flockmail.com (Postfix) with ESMTP id 4dbFZB5nPbz7t8t; Tue, 23 Dec 2025 13:03:46 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=I76jbNhd2RnmoQzo2cA05wxM926Wl/tgrqz3TL3NnOw=; c=relaxed/relaxed; d=ziyao.cc; h=from:to:subject:mime-version:date:cc:message-id:in-reply-to:references:from:to:cc:subject:date:message-id:in-reply-to:references:reply-to; q=dns/txt; s=titan1; t=1766495026; v=1; b=QZrBurUv3CXhzp3FFy9bI/Z7CVNdjHHS7lMRj4rol2r25ZAfM59ObLsQtz3lhLeahovWgQ12 uZC9VD6ALu2KtOhgTkuyKF5u1ftWhweOnCSrfb3LRXpmK8JCTWoz7d4haLsjUQZgeAqKQiclXxx 3Uw1XngdPpvWZqdjusB3LSTQ= Received: from pie (unknown [117.171.66.90]) by smtp-out.flockmail.com (Postfix) with ESMTPA id 4dbFZ26L07z7t88; Tue, 23 Dec 2025 13:03:38 +0000 (UTC) Date: Tue, 23 Dec 2025 13:03:27 +0000 Feedback-ID: :me@ziyao.cc:ziyao.cc:flockmailId From: Yao Zi To: Troy Mitchell , Inochi Amaoto , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Linus Walleij Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: Re: [PATCH 2/2] pinctrl: spacemit: support I/O power domain configuration Message-ID: References: <20251223-kx-pinctrl-aib-io-pwr-domain-v1-0-5f1090a487c7@linux.spacemit.com> <20251223-kx-pinctrl-aib-io-pwr-domain-v1-2-5f1090a487c7@linux.spacemit.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-F-Verdict: SPFVALID X-Titan-Src-Out: 1766495026646385511.30087.5691599438730667089@prod-use1-smtp-out1002. X-CMAE-Score: 0 X-CMAE-Analysis: v=2.4 cv=a8/K9VSF c=1 sm=1 tr=0 ts=694a9332 a=rBp+3XZz9uO5KTvnfbZ58A==:117 a=rBp+3XZz9uO5KTvnfbZ58A==:17 a=kj9zAlcOel0A:10 a=MKtGQD3n3ToA:10 a=CEWIc4RMnpUA:10 a=lv0vYI88AAAA:8 a=q2HxCz5xri-O7L11LKAA:9 a=CjuIK1q_8ugA:10 a=E7e_GlrEz2WywKPBwZdi:22 a=9qqun4PRrEabIEPCFt1_:22 a=3z85VNIBY5UIEeAh_hcH:22 a=NWVoK91CQySWRX1oVYDe:22 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251223_050349_506796_9DF7A856 X-CRM114-Status: GOOD ( 25.88 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Dec 23, 2025 at 05:50:08PM +0800, Troy Mitchell wrote: > On Tue, Dec 23, 2025 at 05:42:26PM +0800, Inochi Amaoto wrote: > > On Tue, Dec 23, 2025 at 05:11:12PM +0800, Troy Mitchell wrote: > > > IO domain power control registers are used to configure the operating > > > voltage of dual-voltage GPIO banks. By default, these registers are > > > configured for 3.3V operation. As a result, even when a GPIO bank is > > > externally supplied with 1.8V, the internal logic continues to > > > operate in the 3.3V domain, which may lead to functional failures. > > > > > > This patch adds support for programming the IO domain power control > > > registers, allowing dual-voltage GPIO banks to be explicitly configured > > > for 1.8V operation when required. > > > > > > Care must be taken when configuring these registers. If a GPIO bank is > > > externally supplied with 3.3V while the corresponding IO power domain > > > is configured for 1.8V, external current injection (back-powering) > > > may occur, potentially causing damage to the GPIO pin. > > > > > > Due to these hardware constraints and safety considerations, the IO > > > domain power control registers are implemented as secure registers. > > > Access to these registers requires unlocking via the AIB Secure Access > > > Register (ASAR) in the APBC block before a single read or write > > > operation can be performed. > > > > > > Signed-off-by: Troy Mitchell > > > --- > > > arch/riscv/boot/dts/spacemit/k1.dtsi | 4 +- > > > drivers/pinctrl/spacemit/pinctrl-k1.c | 131 +++++++++++++++++++++++++++++++++- > > > 2 files changed, 131 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > > > index 7818ca4979b6a7755722919a5958512aa11950ab..23ecb19624f227f3c39de35bf3078379f7a2490e 100644 > > > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > > > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > > > @@ -565,10 +565,12 @@ i2c8: i2c@d401d800 { > > > > > > pinctrl: pinctrl@d401e000 { > > > compatible = "spacemit,k1-pinctrl"; > > > - reg = <0x0 0xd401e000 0x0 0x400>; > > > + reg = <0x0 0xd401e000 0x0 0x400>, > > > + <0x0 0xd401e800 0x0 0x34>; > > > clocks = <&syscon_apbc CLK_AIB>, > > > <&syscon_apbc CLK_AIB_BUS>; > > > clock-names = "func", "bus"; > > > + spacemit,apbc = <&syscon_apbc 0x50>; > > > }; > > > > If you insist on a new reg field, you should change the binding as well. > Yes, I forgot to modify the binding. This will also break ABI compatibility with older devicetrees, I strongly suggest against a new item in reg property. Furthermore, it's unreasonable to describe d401_e000 - d401_e400 and d401_e800 - d401_e834 as separate memory regions. TRM claims the region starting from 0xd401_e000 with length 0xc00 is "Pad Configuration". So I think this separation neither simplifies anything nor matches the hardware. > > This change breaks binding, can we use something like <0x0 0xd401e000 0x0 0x1000>? If the TRM is correct, we probably can and should. > I'll double check this. Thanks! > > - Troy > > > > Regards, > > Inochi Regards, Yao Zi _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv