From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A44DFCA17E for ; Mon, 9 Mar 2026 19:52:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iwXibwoTW79eQYYXoI/LOQ1g+RvuWSGU6CwcFLmXyWA=; b=XDJ5d+QlafPK4d Yxmzv7tz46QCRc5/e+Y117YEfsy/Qp53New2ay+di7yRXHY3nwDbYxKhFu6IcS9Z6CKsvWAANtQNZ U8mI6zKen1OzyNwKixf+TrKfAezFtjFncvJJYWhjxklUfD+rcfu2tff+fXo8TiKdalQ0cUkc6ntiQ z0hp3U8m5T3LtwxJQPV4NjSjOpWzNsmDTEoJnORAx77XMH1/dFLvLDKrIB6jLxFnmRJUoeZMN1kRE bSn48qUclbA+ko4UTV3/1u+Asyxsflgu/iJ4XzqeMAfb0hrs0kZz0PkFihb7BCRVXjsQNnJjDmBjz L7n/n5sFKbbdKDO1W3DQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzgdr-000000085CE-3jAu; Mon, 09 Mar 2026 19:51:51 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vzgdq-000000085Bw-3WpY for linux-riscv@lists.infradead.org; Mon, 09 Mar 2026 19:51:50 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 3592C60054; Mon, 9 Mar 2026 19:51:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8EEDFC4CEF7; Mon, 9 Mar 2026 19:51:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773085909; bh=xM8/Ny/r4IriTwSNVFwt/X7/4waxHBRM2vNObYmgcWg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=tfHeGXWSG0uwvPDJY2nCRkdMzaC2IRdryzlgp+p0E83FrULcn4LOuUh577PcK8AuB 8OilqStmnNO0KgbOnteiyH7zzgRR9CCybSVaXJPyXewRcEp8mg+bEel4UUETzGLnZW We7VAa7aTPnuZsoF5Im9J7rkJNYknL/7077/FtxQuMG/pVp0XUXfPQ1wtiQqAfuh9k rsKBCIbiNlGtYL2E20GgxQbid0Bzg0B/Rb4mSmw3F1oShKM5Jz+g/w5n9y7imBqKUP ForZFKRrKHNFZ2JRoO6mE4CE1nUcMI/NeKKo9Nymw3G4uQEGaK25agXjKG4YLtmfJ9 AQLrLZvbWA6Kg== Date: Mon, 9 Mar 2026 12:51:47 -0700 From: Drew Fustini To: Anirudh Srinivasan Cc: Drew Fustini , Joel Stanley , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Philipp Zabel , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, joel@jms.id.au, mpe@kernel.org, mpe@oss.tenstorrent.com, npiggin@oss.tenstorrent.com, agross@kernel.org, agross@oss.tenstorrent.com, bmasney@redhat.com, Krzysztof Kozlowski Subject: Re: [PATCH v8 3/3] clk: tenstorrent: Add Atlantis clock controller driver Message-ID: References: <20260306-atlantis-clocks-v8-0-6c9b14a4aa8e@oss.tenstorrent.com> <20260306-atlantis-clocks-v8-3-6c9b14a4aa8e@oss.tenstorrent.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260306-atlantis-clocks-v8-3-6c9b14a4aa8e@oss.tenstorrent.com> X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Mar 06, 2026 at 11:12:19AM -0600, Anirudh Srinivasan wrote: > Add driver for clock controller in Tenstorrent Atlantis SoC. This version > of the driver covers clocks from RCPU subsystem. > > 5 types of clocks generated by this controller: PLLs (PLLs > with bypass functionality and an additional Gate clk at output), Shared > Gates (Multiple Gate clks that share an enable bit), standard Muxes, > Dividers and Gates. All clocks are implemented using custom clk ops and > use the regmap interface associated with the syscon. All clocks are derived > from a 24 Mhz oscillator. > > The reset controller is also setup as an auxiliary device of the clock > controller. > > Signed-off-by: Anirudh Srinivasan > --- > MAINTAINERS | 1 + > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/tenstorrent/Kconfig | 14 + > drivers/clk/tenstorrent/Makefile | 3 + > drivers/clk/tenstorrent/atlantis-prcm.c | 870 ++++++++++++++++++++++++++++++++ > 6 files changed, 890 insertions(+) Reviewed-by: Drew Fustini _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv